NameRodríguez Vázquez, Ángel Benito
DepartmentElectrónica y Electromagnetismo
Knowledge areaElectrónica
Professional categoryCatedrático de Universidad
E-mailRequest
           
  • No. publications

    425

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Article
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A self-powered asynchronous image sensor with TFS operation

Gómez Merchán, Rubén; Gómez Merchán, Rubén; Leñero Bardallo, Juan Antonio; Leñero Bardallo, Juan Antonio; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers Inc., 2023-04-01)
This article presents a self-powered image sensor with a novel pixel architecture with energy harvesting capabilities. ...
PhD Thesis
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Design of readout channels for time-of-flight image sensors based on a 28-nm FPGA

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Parsakordasiabi, Mojtaba; Parsakordasiabi, Mojtaba (2023-03-24)
This thesis presents a contribution to the design of readout channels for time-of-flight image sensors. Specifically, the ...
PhD Thesis
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Contributions to the realization of DNN-based visual inference on embedded systems

Fernández Berni, Jorge; Fernández Berni, Jorge; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Velasco Montero, Delia; Velasco Montero, Delia (2023-01-10)
This thesis comprises a set of contributions to the state of the art of embedded computer vision systems. CNNs constitute ...
PhD Thesis
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High-voltage compliant neurostimulator with on-chip power management in standard CMOS technology

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Delgado Restituto, Manuel ; Delgado Restituto, Manuel ; Palomeque Mangut, David; Palomeque Mangut, David (2022-11-11)
Esta tesis se centra en el diseño y desarrollo de circuitos integrados (CIs) en tecnologías de fabricación CMOS estándar ...
PhD Thesis
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Behavioral Modeling of CMOS SPADs Based on TCAD Simulations

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Carmona Galán, Ricardo; Carmona Galán, Ricardo; López Martínez, Juan Manuel; López Martínez, Juan Manuel (2022-01-24)
SPAD stands for Single Photon Avalanche Detectors. SPADs are photodiodes structurally similar to those used in conventional ...
Patent
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Fotomultiplicador digital de combinación or de pulsos

Carmona Galán, Ricardo; Carmona Galán, Ricardo; Vornicu, Ion; Vornicu, Ion; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Oficina Española de Patentes y Marcas , 2022-01-21)
Fotomultiplicador digital de combinación OR de pulsos.El fotomultiplicador comprende un conjunto de macroceldas, cada una ...
Article
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Architecture-level optimization on digital silicon photomultipliers for medical imaging

Bandi, Franco; Bandi, Franco; Ilisie, Victor; Ilisie, Victor; Vornicu, Ion; Vornicu, Ion; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Benlloch, José M.; Benlloch, José M.; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Multidisciplinary Digital Publishing Institute (MDPI), 2022-01-01)
Silicon photomultipliers (SiPMs) are arrays of single-photon avalanche diodes (SPADs) connected in parallel. Analog silicon ...
PhD Thesis
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On The Design of Compressed Sensing CMOS Imagers

Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Trevisi, Marco; Trevisi, Marco (2021-07-23)
El muestreo compresivo (CS) es una teoría de muestreo y una alternativa al proceso de muestreo basado en el teorema de ...
PhD Thesis
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Low-Power Artifact-Aware ImplantableNeural RecordingMicrosystem for Brain- Machine Interfaces

Delgado Restituto, Manuel ; Delgado Restituto, Manuel ; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Pérez Prieto, Norberto; Pérez Prieto, Norberto (2021-06-02)
Neuroscience research into how complex brain functions are implemented at cell level requires in vivo neural recording ...
Article
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A Low-Resources TDC for Multi-Channel Direct ToF Readout Based on a 28-nm FPGA

Parsakordasiabi, Mojtaba; Parsakordasiabi, Mojtaba; Vornicu, Ion; Vornicu, Ion; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Carmona Galán, Ricardo; Carmona Galán, Ricardo (Multidisciplinary Digital Publishing Institute (MDPI), 2021-01-01)
In this paper, we present a proposed field programmable gate array (FPGA)-based time-to-digital converter (TDC) architecture ...
Article
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A 32-Channel Time-Multiplexed Artifact-Aware Neural Recording System

Pérez Prieto, Norberto; Pérez Prieto, Norberto; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Álvarez Dolado, Manuel; Álvarez Dolado, Manuel; Delgado Restituto, Manuel ; Delgado Restituto, Manuel  (Institute of Electrical and Electronics Engineers, 2021-01-01)
This paper presents a low-power, low-noise microsystem for the recording of neural local field potentials or ...
PhD Thesis
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Diseño de circuitos integrados para interfaces neuronales implantables

Delgado Restituto, Manuel ; Delgado Restituto, Manuel ; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Valtierra, José Luis; Valtierra, José Luis (2020-06-10)
Progress in microfabrication technology has opened the way for new possibilities in neuroscience and medicine. Chronic, ...
PhD Thesis
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Design of CMOS Digital Silicon Photomultipliers with ToF for Positron Emission Tomography

Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Bandi, Franco Nahuel; Bandi, Franco Nahuel (2020-05-29)
This thesis presents a contribution to the design of single-photon detectors for medical imaging. Specifically, the focus ...
Final Degree Project
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Diseño de un convertidor de tiempo a digital para la estimación del tiempo de vuelo de fotones

Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Piña Martínez, Manuel; Piña Martínez, Manuel (2020-01-01)
Los Convertidores de Tiempo a Digital (TDC) son dispositivos que se basan en medir la diferencia entre dos señales de ...
Master's Final Project
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Diseño de un sensor de imagen asíncrono autoalimentado mediante captación de energía solar

Leñero Bardallo, Juan Antonio; Leñero Bardallo, Juan Antonio; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Gómez Merchán, Rubén; Gómez Merchán, Rubén (2020-01-01)
En este Trabajo de Fin de Máster se ha diseñado un sensor asíncrono con una arquitectura del tipo Time-to-First-Spike ...
Article
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Compressive Imaging Using RIP-Compliant CMOS Imager Architecture and Landweber Reconstruction

Trevisi, Marco; Trevisi, Marco; Akbari, Ali; Akbari, Ali; Trocan, Maria; Trocan, Maria; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Carmona Galán, Ricardo; Carmona Galán, Ricardo (Institute of Electrical and Electronics Engineers, 2020-01-01)
In this paper, we present a new image sensor architecture for fast and accurate compressive sensing (CS) of natural images. ...
Presentation
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VersaTile Convolutional Neural Network Mapping on FPGAs

Muñío Gracia, A.; Muñío Gracia, A.; Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, R.; Carmona Galán, R.; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers (IEEE), 2020-01-01)
Convolutional Neural Networks (ConvNets) are directed acyclic graphs with node transitions determined by a 1 set of ...
Article
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PreVIous: A Methodology for Prediction of Visual Inference Performance on IoT Devices

Velasco Montero, Delia; Velasco Montero, Delia; Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2020-01-01)
This article presents PreVIous, a methodology to predict the performance of convolutional neural networks (CNNs) in terms ...
PhD Thesis
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Sistema de predicción epileptogenica en lazo cerrado basado en matrices sub-durales

Delgado Restituto, Manuel ; Delgado Restituto, Manuel ; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Romaine, James Brian; Romaine, James Brian (2019-06-28)
The human brain is the most complex organ in the human body, which consists of approximately 100 billion neurons. These ...
Presentation
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A 32 Input Multiplexed Channel Analog Front-End with Spatial Delta Encoding Technique and Differential Artifacts Compression

Pérez Prieto, Norberto; Pérez Prieto, Norberto; Fiorelli, Rafaella; Fiorelli, Rafaella; Valtierra, José Luis; Valtierra, José Luis; Pérez García, Pablo; Pérez García, Pablo; Delgado Restituto, Manuel ; Delgado Restituto, Manuel ; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (IEEE Computer Society, 2019-01-01)
This paper describes a low-noise, low-power and high dynamic range analog front-end intended for sensing neural signals. ...
Presentation
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Low-Noise and High-Efficiency Near-IR SPADs in 110nm CIS Technology

Vornicu, Ion; Vornicu, Ion; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2019-01-01)
Photon detection at longer wavelengths is much desired for LiDAR applications. Silicon photodiodes with deeper junctions ...
Article
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Phase Synchronization Operator for On-Chip Brain Functional Connectivity Computation

Delgado Restituto, Manuel; Delgado Restituto, Manuel; Romaine, James Brian; Romaine, James Brian; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2019-01-01)
This paper presents an integer-based digital processor for the calculation of phase synchronization between two neural ...
Presentation
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Artifact-Aware Analogue/Mixed-Signal Front-Ends for Neural Recording Applications

Pérez Prieto, Norberto; Pérez Prieto, Norberto; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2019-01-01)
This paper presents a brief review of techniques to overcome the problems associated with artifacts in analog frontends ...
Article
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Compact Real-Time Inter-Frame Histogram Builder for 15-Bits High-Speed ToF-Imagers Based on Single-Photon Detection

Vornicu, Ion; Vornicu, Ion; Darie, Ángela; Darie, Ángela; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2019-01-01)
Time-of-flight (ToF) image sensors based on single-photon detection, i.e., SPADs, require some filtering of pixel readings. ...
Article
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Characterization-Based Modeling of Retriggering and Afterpulsing for Passively Quenched CMOS SPADs

Moreno García, Manuel; Moreno García, Manuel; Pancheri, Lucio; Pancheri, Lucio; Perenzoni, Matteo; Perenzoni, Matteo; Río Fernández, Rocío del; Río Fernández, Rocío del; Guerra Vinuesa, Oscar; Guerra Vinuesa, Oscar; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2019-01-01)
The current trend in the design of systems based on CMOS SPADs is to adopt smaller technological nodes, allowing the ...
Presentation
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A Sub-µW Reconfigurable Front-End for Invasive Neural Recording

Valtierra, José Luis; Valtierra, José Luis; Fiorelli, Rafaella; Fiorelli, Rafaella; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2019-01-01)
This paper presents a sub-μW ac-coupled reconfigurable front-end for the purpose of neural recording. The proposed topology ...
Presentation
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ToF Estimation Based on Compressed Real-Time Histogram Builder for SPAD Image Sensors

Vornicu, Ion; Vornicu, Ion; Darie, Ángela; Darie, Ángela; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2019-01-01)
This paper presents a FPGA implementation of a novel depth map estimation algorithm for direct time-of-flight CMOS image ...
Presentation
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A High TCMRR, Inherently Charge Balanced Bidirectional Front-End for Multichannel Closed-Loop Neuromodulation

Valtierra, José Luis; Valtierra, José Luis; Fiorelli, Rafaella; Fiorelli, Rafaella; Pérez Prieto, Norberto; Pérez Prieto, Norberto; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2019-01-01)
This paper describes a multichannel bidirectional front-end for implantable closed-loop neuromodulation. Stimulation ...
Presentation
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On the Correlation of CNN Performance and Hardware Metrics for Visual Inference on a Low-Cost CPU-based Platform

Velasco Montero, Delia; Velasco Montero, Delia; Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2019-01-01)
While providing the same functionality, the various Deep Learning software frameworks available these days do not provide ...
Presentation
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A Sub-μVRms Chopper Front-End for ECoG Recording

Pérez Prieto, Norberto; Pérez Prieto, Norberto; Valtierra, José Luis; Valtierra, José Luis; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2019-01-01)
This paper presents a low-noise, low-power fully differential chopper-modulated front-end circuit intended for ECoG signal ...
Article
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Offset-calibration with Time-Domain Comparators Using Inversion-mode Varactors

Fiorelli, Rafaella; Fiorelli, Rafaella; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2019-01-01)
This paper presents a differential time-domain comparator formed by two voltage controlled delay lines, one per input ...
Patent
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Sensor de imágenes

Trevisi, Marco; Trevisi, Marco; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Oficina Española de Patentes y Marcas , 2018-10-03)
Sensor de imágenes.El objeto de la invención es un sensor de imágenes (100) con muestreo compresivo "on-chip" para la ...
Article
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Applications of event‐based image sensors—Review and analysis

Leñero Bardallo, Juan Antonio; Leñero Bardallo, Juan Antonio; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Wiley, 2018-08-01)
The spread of event‐driven asynchronous vision sensors during the last years has increased significantly the industrial ...
Article
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Asynchronous spiking pixel with programmable sensitivity to illumination

Leñero Bardallo, Juan Antonio; Leñero Bardallo, Juan Antonio; Delgado Restituto, Manuel ; Delgado Restituto, Manuel ; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2018-01-01)
A spiking pixel to be used in image sensor arrays for asynchronous frame-based operation is presented. The pixel features ...
Presentation
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Demo: Results of 'iCaveats', a Project on the Integration of Architectures and Components for Embedded Vision

Carmona Galán, Ricardo; Carmona Galán, Ricardo; Fernández Berni, Jorge; Fernández Berni, Jorge; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; López Martínez, Paula; López Martínez, Paula; Brea Sánchez, Víctor Manuel; Brea Sánchez, Víctor Manuel; Cabello Ferrer, D.; Cabello Ferrer, D.; Zapata Pérez, J.; Zapata Pérez, J. (ACM Digital Library, 2018-01-01)
iCaveats is a Project on the integration of components and architectures for embedded vision in transport and security ...
Presentation
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Color Tone-Mapping Circuit for a Focal-Plane Implementation

Nunes, Gustavo M. S.; Nunes, Gustavo M. S.; Oliveira, Fernanda D. V. R.; Oliveira, Fernanda D. V. R.; Gomes, Jose Gabriel R. C.; Gomes, Jose Gabriel R. C.; Petraglia, Antonio; Petraglia, Antonio; Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (IEEE, 2018-01-01)
In this article, we present a review of the driving principles and parameters of a previously reported focal-plane ...
Presentation
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On-The-Fly Deployment of Deep Neural Networks on Heterogeneous Hardware in a Low-Cost Smart Camera

Velasco Montero, Delia; Velasco Montero, Delia; Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Association for Computing Machinery, 2018-01-01)
This demo showcases a low-cost smart camera where different hardware configurations can be selected to perform image ...
Presentation
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Concurrent focal-plane generation of compressed samples fromtime-encoded pixel values

Trevisi, M.; Trevisi, M.; Bandala, H.C.; Bandala, H.C.; Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (IEEE, 2018-01-01)
Compressive sampling allows wrapping the relevant content of an image in a reduced set of data. It exploits the sparsity ...
Presentation
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An Experimentally-Validated Verilog-A SPAD Model Extracted from TCAD Simulation

López Martínez, Juan Manuel; López Martínez, Juan Manuel; Vornicu, Ion; Vornicu, Ion; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2018-01-01)
Single-photon avalanche diodes (SPAD) are photodetectors with exceptional characteristics. This paper proposes a new ...
Article
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Real-Time Inter-Frame Histogram Builder for SPAD Image Sensors

Vornicu, Ion; Vornicu, Ion; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2018-01-01)
CMOS image sensors based on single-photon avalanche-diodes (SPAD) are suitable for 2D and 3D vision. Limited by uncorrelated ...
Article
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Performance Analysis of Real-Time DNN Inference on Raspberry Pi

Velasco Montero, Delia; Velasco Montero, Delia; Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (SPIE, 2018-01-01)
Deep Neural Networks (DNNs) have emerged as the reference processing architecture for the implementation of multiple ...
Article
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On the Analysis and Detection of Flames Withan Asynchronous Spiking Image Sensor

Leñero Bardallo, Juan Antonio; Leñero Bardallo, Juan Antonio; Guerrero Rodríguez, José María; Guerrero Rodríguez, José María; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (IEEE, 2018-01-01)
We have investigated the capabilities of a customasynchronous spiking image sensor operating in the ...
Article
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Optimum Selection of DNN Model and Framework for Edge Inference

Velasco Montero, Delia; Velasco Montero, Delia; Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (IEEE, 2018-01-01)
This paper describes a methodology to select the optimum combination of deep neuralnetwork and software framework for ...
Presentation
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1D Cellular Automata for Pulse Width Modulated Compressive Sampling CMOS Image Sensors

Trevisi, Marco; Trevisi, Marco; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2018-01-01)
Compressive sensing (CS) is an alternative to the Shannon limit when the signal to be acquired is known to be sparse or ...
Presentation
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Live Demonstration: Low-Power Low-CostCyber-Physical System for Bird Monitoring

García-Rodríguez, A.; García-Rodríguez, A.; Rodríguez-Sakamoto, R.; Rodríguez-Sakamoto, R.; Fernández Berni, Jorge; Fernández Berni, Jorge; Río Fernández, Rocío del; Río Fernández, Rocío del; Marín, J.; Marín, J.; Baena, M.; Baena, M.; Bustamante, J.; Bustamante, J.; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (IEEE, 2018-01-01)
This live demonstration showcases a cyber-physical system tailored for inexpensive remote bird monitoring. A comprehensive ...
Article
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CMOS Vision Sensors: Embedding Computer Vision at Imaging Front-Ends

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Fernández Berni, Jorge; Fernández Berni, Jorge; Leñero Bardallo, Juan Antonio; Leñero Bardallo, Juan Antonio; Vornicu, Ion; Vornicu, Ion; Carmona Galán, Ricardo; Carmona Galán, Ricardo (IEEE, 2018-01-01)
CMOS Image Sensors (CIS) are key for imaging technol-ogies. These chips are conceived for capturing opticalscenes ...
Article
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Sun Sensor Based on a Luminance Spiking Pixel Array

Leñero Bardallo, Juan Antonio; Leñero Bardallo, Juan Antonio; Farian, Lukasz; Farian, Lukasz; Guerrero Rodríguez, Jesús Manuel; Guerrero Rodríguez, Jesús Manuel; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2017-01-01)
We present a novel sun sensor concept. It is the very first sun sensor built with an address event representation spiking ...
Article
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Compensation of PVT Variations in ToF Imagers with In-Pixel TDC

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Vornicu, Ion; Vornicu, Ion; Carmona Galán, Ricardo; Carmona Galán, Ricardo (MDPI, 2017-01-01)
The design of a direct time-of-flight complementary metal-oxide-semiconductor (CMOS) image sensor (dToF-CIS) based on a ...
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A Wide Linear Dynamic Range Image Sensor Based on Asynchronous Self-Reset and Tagging of Saturation Events

Leñero Bardallo, Juan Antonio; Leñero Bardallo, Juan Antonio; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2017-01-01)
We report a high dynamic range (HDR) image sensor with a linear response that overcomes some of the limitations of sensors ...
Article
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A CMOS Digital SiPM With Focal-Plane Light-Spot Statistics for DOI Computation

Vornicu, Ion; Vornicu, Ion; Bandi, Franco; Bandi, Franco; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2017-01-01)
Silicon photomultipliers can be used to infer the depth-of-interaction (DOI) in scintillator crystals. DOI can help to ...
Presentation
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Design of a compact and low-power TDC for an array of SiPM's in 110nm CIS technology

Bandi, Franco; Bandi, Franco; Vornicu, Ion; Vornicu, Ion; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2017-01-01)
Silicon photomultipliers (SiPMs) are meant to substitute photomultiplier tubes in high-energy physics detectors and nuclear ...
Article
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Low-Power CMOS Vision Sensor for Gaussian Pyramid Extraction

Suárez Cambre, Manuel; Suárez Cambre, Manuel; Brea Sánchez, Víctor Manuel; Brea Sánchez, Víctor Manuel; Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Cabello, D.; Cabello, D.; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2017-01-01)
This paper introduces a CMOS vision sensor chip in a standard 0.18 μm CMOS technology for Gaussian pyramid extraction. The ...
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Real-time phase correlation based integrated system for seizure detection

Romaine, James Brian; Romaine, James Brian; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Leñero Bardallo, Juan Antonio; Leñero Bardallo, Juan Antonio; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (The Society of Photo-Optical Instrumentation Engineers, 2017-01-01)
This paper reports a low area, low power, integer-based digital processor for the calculation of phase synchronization ...
Presentation
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Live demonstration: Photon counting and direct ToF camera prototype based on CMOS SPADs

Vornicu, Ion; Vornicu, Ion; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2017-01-01)
This demonstrator reveals the performance and features of a single photon avalanche diode (SPAD) camera prototype. It is ...
Final Degree Project
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Diseño de “buffers” para el control de píxeles en sensores ToF

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Balmaseda Delgado, Antonio Jesús; Balmaseda Delgado, Antonio Jesús (2017-01-01)
La tecnología de tiempo de vuelo se muestra hoy como una muy buena opción para 3D ‘imaging’. Sin embargo, los sensores con ...
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Arrayable Voltage-Controlled Ring-Oscillator for Direct Time-of-Flight Image Sensors

Vornicu, Ion; Vornicu, Ion; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2017-01-01)
Direct time-of-flight (d-ToF) estimation with high frame rate requires the incorporation of a time-to-digital converter ...
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System-Level Design of a 64-Channel Low Power Neural Spike Recording Sensor

Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Pérez, Alberto; Rodríguez Pérez, Alberto; Darie, Ángela; Darie, Ángela; Soto Sánchez, Cristina; Soto Sánchez, Cristina; Fernández Jover, Eduardo; Fernández Jover, Eduardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2017-01-01)
This paper reports an integrated 64-channel neural spike recording sensor, together with all the circuitry to process and ...
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In the quest of vision-sensors-on-chip: Pre-processing sensors for data reduction

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Fernández Berni, Jorge; Fernández Berni, Jorge; Brea Sánchez, Víctor Manuel; Brea Sánchez, Víctor Manuel; Leñero Bardallo, Juan Antonio; Leñero Bardallo, Juan Antonio (Society for Imaging Science and Technology, 2017-01-01)
This paper shows that the implementation of vision systems benefits from the usage of sensing front-end chips with embedded ...
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A sun sensor implemented with an asynchronous luminance vision sensor

Leñero Bardallo, Juan Antonio; Leñero Bardallo, Juan Antonio; Guerrero Rodríguez, José María; Guerrero Rodríguez, José María; Farian, Łukasz; Farian, Łukasz; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2017-01-01)
A sun sensor implemented with a spiking pixel matrix is reported. It is the very first one based on an asynchronous ...
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TFET-based Well Capacity Adjustment in Active Pixel Sensor for Enhanced High Dynamic Range

Fernández Berni, Jorge; Fernández Berni, Jorge; Niemier, M.; Niemier, M.; Hu, X.S.; Hu, X.S.; Lu, H.; Lu, H.; Li, W.; Li, W.; Fay, P.; Fay, P.; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2017-01-01)
We present a Tunnel Field-Effect Transistor (TFET)-based pixel circuit for well capacity adjustment that does not require ...
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Gaussian Pyramid: Comparative Analysis of Hardware Architectures

Oliveira, Fernanda DV.R.; Oliveira, Fernanda DV.R.; Gomes, José Gabriel; Gomes, José Gabriel; Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Río Fernández, Rocío del; Río Fernández, Rocío del; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2017-01-01)
This paper addresses a comparison of architectures for the hardware implementation of Gaussian image pyramids. Main ...
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A 2.2 μW analog front-end for multichannel neural recording

Valtierra, José Luis; Valtierra, José Luis; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2017-01-01)
In this paper an analog front-end for the multi-channel implantable recording of neural signals is presented. It is comprised ...
Presentation
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Characterization of electrical crosstalk in 4T-APS arrays using TCAD simulations

López Martínez, Juan Manuel; López Martínez, Juan Manuel; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2017-01-01)
TCAD simulations have been conducted on a CMOS image sensor in order to characterize the electrical component of the ...
Presentation
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A chaotic switched-capacitor circuit for characteristic CMOS noise distributions generation

Pérez Prieto, Norberto; Pérez Prieto, Norberto; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2017-01-01)
A switched-capacitor circuit is proposed for the generation of noise resembling the typical noise spectral density of MOS ...
Presentation
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Photon Counting and Direct ToF Camera Prototype Based on CMOS SPADs

Vornicu, Ion; Vornicu, Ion; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2017-01-01)
This paper presents a camera prototype for 2D/3D image capture in low illumination conditions based on single-photon ...
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Pipeline AER arbitration with event aging

Leñero Bardallo, Juan Antonio; Leñero Bardallo, Juan Antonio; Pérez Peña, Fernando; Pérez Peña, Fernando; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2017-01-01)
We present a simple circuit to handle communication between cells of neuromorphic arrays. It allows cells to operate ...
Presentation
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Compressive image sensor architecture with on-chip measurement matrix generation

Trevisi, Marco; Trevisi, Marco; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2017-01-01)
A CMOS image sensor architecture that uses a cellular automaton for the pseudo-random compressive sampling matrix generation ...
PhD Thesis
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Diseño CMOS de un sistema de visión “on-chip” para aplicaciones de muy alta velocidad

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Jiménez Garrido, Francisco José; Jiménez Garrido, Francisco José (2016-02-08)
Esta Tesis presenta arquitecturas, circuitos y chips para el diseño de sensores de visión CMOS con procesamiento paralelo ...
Presentation
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Integer-based digital processor for the estimation of phase synchronization between neural signals

Romaine, James Brian; Romaine, James Brian; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Leñero Bardallo, Juan Antonio; Leñero Bardallo, Juan Antonio; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2016-01-01)
This paper reports a low area, low power, integer-based neural digital processor for the calculation of phase synchronization ...
Article
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Single-Exposure HDR Technique Based on Tunable Balance Between Local and Global Adaptation

Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2016-01-01)
This brief describes a high-dynamic-range technique that compresses wide ranges of illuminations into the available signal ...
Presentation
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Hardware-Aware Performance Evaluation for the Co-Design of Image Sensors and Vision Algorithms

Villegas Pachón, C.; Villegas Pachón, C.; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Fernández Berni, Jorge; Fernández Berni, Jorge; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2016-01-01)
The top-down approach to system design allows obtaining separate specifications for each subsystem. In the case of vision ...
Article
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A Bio-Inspired Vision Sensor With Dual Operation and Readout Modes

Leñero Bardallo, Juan Antonio; Leñero Bardallo, Juan Antonio; Hafliger, Philipp Dominik; Hafliger, Philipp Dominik; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2016-01-01)
This paper presents a novel event-based vision sensor with two operation modes: intensity mode and spatial contrast ...
Final Degree Project
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Sobre el uso de técnicas chopper para la reducción del ruido flicker en amplificadores para la captación de señales neuronales

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Pérez Prieto, Norberto; Pérez Prieto, Norberto (2016-01-01)
La captación de señales neuronales mediante electrodos conectados a circuitos micro-electrónicos es necesaria para ...
Presentation
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Mixed-signal quadratic operators for the feature extraction of neural signals

Delgado Restituto, Manuel; Delgado Restituto, Manuel; Fiorelli, Rafaella; Fiorelli, Rafaella; Carrasco Robles, Manuel; Carrasco Robles, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2016-01-01)
This paper presents design principles for reusing charge-redistribution SAR ADCs as digital multipliers. This is illustrated ...
Presentation
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Pixel-wise parameter adaptation for single-exposure extension of the image dynamic range

Carmona Galán, Ricardo; Carmona Galán, Ricardo; Leñero Bardallo, Juan Antonio; Leñero Bardallo, Juan Antonio; Fernández Berni, Jorge; Fernández Berni, Jorge; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Association for Computing Machinery, 2016-01-01)
High dynamic range imaging is central in application fields like surveillance, intelligent transportation and advanced ...
Presentation
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A 4-mode reconfigurable low noise amplifier for implantable neural recording channels

Valtierra, José Luis; Valtierra, José Luis; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Delgado Restituto, Manuel; Delgado Restituto, Manuel (Institute of Electrical and Electronics Engineers, 2016-01-01)
In this paper a reconfigurable implantable low noise amplifier for the recording of neural signals is presented. It is ...
Presentation
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In-pixel Voltage-Controlled Ring-Oscillator for Phase Interpolation in ToF Image Sensors

Vornicu, Ion; Vornicu, Ion; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (2016-01-01)
The design and measurements of a CMOS pseudodifferential voltage-controlled ring-oscillator (VCRO) are presented. It is ...
Article
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Image Sensing Scheme Enabling Fully-Programmable Light Adaptation and Tone Mapping with a Single Exposure

Fernández Berni, Jorge; Fernández Berni, Jorge; Oliveira, Fernanda D.V.R.; Oliveira, Fernanda D.V.R.; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2016-01-01)
This letter presents new insights into a high dynamic range (HDR) technique recently reported. We demonstrate that two ...
Presentation
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Experimental Evidence of Power Efficiency due to Architecture in Cellular Processor Array Chips

Carmona Galán, Ricardo; Carmona Galán, Ricardo; Fernández Berni, Jorge; Fernández Berni, Jorge; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2016-01-01)
Speeding up algorithm execution can be achieved by increasing the number of processing cores working in parallel. Of course, ...
Presentation
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High-Level Performance Evaluation of Object Detection Based on Massively Parallel Focal-Plane Acceleration Requiring Minimum Pixel Area Overhead

Parra Barrero, Eloy; Parra Barrero, Eloy; Fernández Berni, Jorge; Fernández Berni, Jorge; Oliveira, Fernanda D.V.R.; Oliveira, Fernanda D.V.R.; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Springer, 2016-01-01)
Smart CMOS image sensors can leverage the inherent data-level parallelism and regular computational flow of early vision ...
Presentation
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Focal-Plane Scale Space Generation with a 6T Pixel Architecture

Oliveira, Fernanda D.V.R.; Oliveira, Fernanda D.V.R.; Gomes, José Gabriel; Gomes, José Gabriel; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Fernández Berni, Jorge; Fernández Berni, Jorge; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Society for Imaging Science and Technology, 2016-01-01)
Aiming at designing a CMOS image sensor that combines high fill factor and focal-plane implementation of instrumental image ...
Presentation
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A 76nW, 4kS/s 10-bit SAR ADC with offset cancellation for biomedical applications

Delgado Restituto, Manuel; Delgado Restituto, Manuel; Carrasco Robles, Manuel; Carrasco Robles, Manuel; Fiorelli, Rafaella; Fiorelli, Rafaella; Ginés Arteaga, Antonio José; Ginés Arteaga, Antonio José; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2016-01-01)
This paper presents a 10-bit fully-differential rail-to-rail successive approximation (SAR) ADC designed for biomedical ...
Article
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Compact CMOS active quenching/recharge circuit for SPAD arrays

Vornicu, Ion; Vornicu, Ion; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Pérez Verdú, Belén; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Wiley-Blackwell, 2016-01-01)
Avalanche diodes operating in Geiger mode are able to detect single photon events. They can be employed to photon counting ...
Chapter of Book
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Image Feature Extraction Acceleration

Fernández Berni, Jorge; Fernández Berni, Jorge; Suárez Cambre, Manuel; Suárez Cambre, Manuel; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Brea Sánchez, Víctor Manuel; Brea Sánchez, Víctor Manuel; Río Fernández, Rocío del; Río Fernández, Rocío del; Cabello, D.; Cabello, D.; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Springer, 2016-01-01)
Image feature extraction is instrumental for most of the best-performing algorithms in computer vision. However, it is ...
Article
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Enhanced Sensitivity of CMOS Image Sensors by Stacked Diodes

Leñero Bardallo, Juan Antonio; Leñero Bardallo, Juan Antonio; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2016-01-01)
We have investigated and compared the performance of photodiodes built with stacked p/n junctions operating in parallel ...
Presentation
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Effects of capacitors non-idealities in un-even split-capacitor array SAR ADCs

Fiorelli, Rafaella; Fiorelli, Rafaella; Guerra Vinuesa, Oscar; Guerra Vinuesa, Oscar; Río Fernández, Rocío del; Río Fernández, Rocío del; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2016-01-01)
This paper studies the effects of capacitors non-idealities in the performance of un-even split-capacitor SAR ADCs. Also, ...
Presentation
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Live Demonstration: Single-Exposure HDR Image Acquisition Based on Tunable Balance between Local and Global Adaptation

Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2016-01-01)
This live demonstration showcases a high dynamic range technique that compresses wide ranges of illuminations into the ...
Presentation
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Demo: Image Sensing Scheme Enabling Fully-Programmable Light Adaptation and Tone Mapping with a Single Exposure

Fernández Berni, Jorge; Fernández Berni, Jorge; Oliveira, Fernanda D.V.R.; Oliveira, Fernanda D.V.R.; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Association for Computing Machinery, 2016-01-01)
This demo showcases a High Dynamic Range (HDR) technique recently reported. We demonstrate that two intertwined photodiodes ...
Presentation
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Non-recursive method for motion detection from a compressive-sampled video stream

Trevisi, Marco; Trevisi, Marco; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2016-01-01)
This paper introduces a non-recursive algorithm for motion detection directly from the analysis of compressed samples. The ...
Patent
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Sistema y método de adquisición y transferencia de actividad neuronal

Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Pérez, Alberto; Rodríguez Pérez, Alberto; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Oficina Española de Patentes y Marcas , 2015-10-20)
Sistema (1) de adquisición y transferencia de actividad neuronal que comprende al menos una pluralidad de sensores ...
Patent
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Hardware para cómputo de la imagen integral

Del Río Fernández, Rocío; Del Río Fernández, Rocío; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Fernández Berni, Jorge; Fernández Berni, Jorge; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Oficina Española de Patentes y Marcas , 2015-10-20)
La presente invención, según se expresa en el enunciado de esta memoria descriptiva, consiste en hardware de señal mixta ...
Article
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Bottom-up performance analysis of focal-plane mixed-signal hardware for Viola–Jones early vision tasks

Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Río Fernández, Rocío del; Río Fernández, Rocío del; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (John Wiley & Sons, 2015-01-01)
Focal-plane mixed-signal arrays have traditionally been designed according to the general claim that moderate accuracy in ...
Presentation
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On the design of a sparsifying dictionary for compressive image feature extraction

Trevisi, Marco; Trevisi, Marco; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Fernández Berni, Jorge; Fernández Berni, Jorge; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2015-01-01)
Compressive sensing is an alternative to Nyquist-rate sampling when the signal to be acquired is known to be sparse or ...
Presentation
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Real-time single-exposure ROI-driven HDR adaptation based on focal-plane reconfiguration

Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Río Fernández, Rocío del; Río Fernández, Rocío del; Kleihorst, R.; Kleihorst, R.; Philips, Wilfried; Philips, Wilfried; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Society of Photo-Optical Instrumentation Engineers, 2015-01-01)
This paper describes a prototype smart imager capable of adjusting the photo-integration time of multiple regions of ...
Presentation
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Design considerations for a low-noise CMOS image sensor

González Márquez, Ana; González Márquez, Ana; Charlet, Alexandre; Charlet, Alexandre; Villegas, Alberto; Villegas, Alberto; Jiménez Garrido, Francisco José; Jiménez Garrido, Francisco José; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (SPIE- The International Society for Optical Engineering, 2015-01-01)
This paper reports a Low-Noise CMOS Image Sensor. Low-noise operation is achieved owing to the combination of a noise-enhanced ...
Final Degree Project
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Aceleración del algoritmo de Viola-Jones mediante rejillas de procesamiento masivamente paralelo en el plano focal

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Fernández Berni, Jorge; Fernández Berni, Jorge; Parra Barrero, Eloy; Parra Barrero, Eloy (2015-01-01)
El algoritmo de Viola-Jones es un método de detección de objetos que se usa ampliamente en la detección de caras en imágenes ...
Article
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A 151 dB high dynamic range CMOS image sensor chip architecture with tone mapping compression embedded in-pixel

Vargas Sierra, Sonia; Vargas Sierra, Sonia; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2015-01-01)
This paper presents a high dynamic range CMOS image sensor that implements an in-pixel content-aware adaptive global tone ...
Presentation
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Live demonstration: Real-time high dynamic range video acquisition using in-pixel adaptive content-aware tone mapping compression

Vargas Sierra, Sonia; Vargas Sierra, Sonia; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2015-01-01)
This demonstration targets the acquisition of realtime video sequences involving High Dynamic Range (HDR) scenes. Adaptation ...
Presentation
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A high dynamic range image sensor with linear response based on asynchronous event detection

Leñero Bardallo, Juan Antonio; Leñero Bardallo, Juan Antonio; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2015-01-01)
This paper investigates the potential of an image sensor that combines event-based asynchronous outputs with conventional ...
Presentation
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On the calibration of a SPAD-based 3D imager with in-pixel TDC using a time-gated technique

Vornicu, Ion; Vornicu, Ion; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2015-01-01)
The optical characterization of a CMOS 64×64 single-photon avalanche-diode (SPAD) array with in-pixel 11b time-to-digital ...
Article
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A SPAD-based 3D imager with in-pixel TDC for 145ps-accuracy ToF measurement

Vornicu, Ion; Vornicu, Ion; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (SPIE, 2015-01-01)
The design and measurements of a CMOS 64 × 64 Single-Photon Avalanche-Diode (SPAD) array with in-pixel Time-to-Digital ...
Presentation
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Live Demonstration: Gaussian Pyramid Extraction with a CMOS Vision Sensor

Suárez Cambre, Manuel; Suárez Cambre, Manuel; Brea Sánchez, Víctor Manuel; Brea Sánchez, Víctor Manuel; Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Cabello, D.; Cabello, D.; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2015-01-01)
This live demonstration showcases the Gaussian pyramid with a CMOS vision sensor. The chip features a 176 120 pixel array ...
Patent
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Dispositivo para la detección Hardware de extremos locales en una imagen

Carmona Galan, Ricardo; Carmona Galan, Ricardo; Fernández Berni, Jorge; Fernández Berni, Jorge; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Oficina Española de Patentes y Marcas , 2014-05-12)
Dispositivo y método para la detección hardware de extremos locales en una imagen que comprende una pluralidad de celdas ...
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A 330μW, 64-channel neural recording sensor with embedded spike feature extraction and auto-calibration

Rodríguez Pérez, Alberto; Rodríguez Pérez, Alberto; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Darie, Ángela; Darie, Ángela; Soto Sánchez, Cristina; Soto Sánchez, Cristina; Fernández Jover, Eduardo; Fernández Jover, Eduardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2014-01-01)
his paper reports an integrated 64-channel neural recording sensor. Neural signals are acquired, filtered, digitized and ...
Presentation
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Demo: A Prototype Vision Sensor for Real-time Focal-plane Obfuscation through Tunable Pixelation

Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Río Fernández, Rocío del; Río Fernández, Rocío del; Kleihorst, R.; Kleihorst, R.; Philips, Wilfried; Philips, Wilfried; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2014-01-01)
Privacy concerns are hindering the introduction of smart camera networks in prospective application scenarios like retail ...
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Wide range 8ps incremental resolution time interval generator based on FPGA technology

Vornicu, Ion; Vornicu, Ion; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2014-01-01)
Accurate generation of picosecond-resolution wide-range time intervals has become a necessity for the characterization of ...
Presentation
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Review of ADCs for imaging

Leñero Bardallo, Juan Antonio; Leñero Bardallo, Juan Antonio; Fernández Berni, Jorge; Fernández Berni, Jorge; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Society of Photo-Optical Instrumentation Engineers, 2014-01-01)
The aim of this article is to guide image sensors designers to optimize the analog-to-digital conversion of pixel outputs. ...
Article
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High dynamic range adaptation for ROI tracking based on reconfigurable concurrent dual-sensing

Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Río Fernández, Rocío del; Río Fernández, Rocío del; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institution of Civil Engineers (Great Britain), 2014-01-01)
A single-exposure technique to extend the dynamic range of vision sensors is presented. It is particularly suitable for ...
Presentation
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A 26.5 nJ/px 2.64 Mpx/s CMOS Vision Sensor for Gaussian Pyramid Extraction

Suárez, Manuel; Suárez, Manuel; Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Cabello, D.; Cabello, D.; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2014-01-01)
This paper introduces a CMOS vision sensor to extract the Gaussian pyramid with an energy cost of 26.5 nJ/px at 2.64 Mpx/s, ...
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Gaussian Pyramid Extraction with a CMOS Vision Sensor

Suárez Cambre, Manuel; Suárez Cambre, Manuel; Brea Sánchez, Víctor Manuel; Brea Sánchez, Víctor Manuel; Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Cabello, D.; Cabello, D.; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2014-01-01)
This paper addresses a CMOS vision sensor with 176 × 120 pixels in standard 0.18 μm CMOS technology that computes the ...
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A QVGA Vision Sensor with Multi-functional Pixels for Focal-Plane Programmable Obfuscation

Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Río Fernández, Rocío del; Río Fernández, Rocío del; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2014-01-01)
Privacy awareness constitutes a critical aspect for smart camera networks. An ideal awless protection of sensitive information ...
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Self-calibration of neural recording sensors

Rodríguez Pérez, Alberto; Rodríguez Pérez, Alberto; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2014-01-01)
This paper reports a calibration system for automatically adjusting the bandpass and gain characteristics of programmable ...
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Smart imaging for power-efficient extraction of Viola-Jones local descriptors

Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Río Fernández, Rocío del; Río Fernández, Rocío del; Leñero Bardallo, Juan Antonio; Leñero Bardallo, Juan Antonio; Suárez Cambre, Manuel; Suárez Cambre, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Society of Photo-Optical Instrumentation Engineers, 2014-01-01)
In computer vision, local descriptors permit to summarize relevant visual cues through feature vectors. These vectors ...
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Equalization-Based Digital Background Calibration Technique for Pipelined ADCs

Zeinali, Behzad; Zeinali, Behzad; Moosazadeh, Tohid; Moosazadeh, Tohid; Yavari, Mohammad; Yavari, Mohammad; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2014-01-01)
In this paper, we present a digital background calibration technique for pipelined analog-to-digital converters (ADCs). ...
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A CMOS Imager for Time-of-Flight and Photon Counting Based on Single Photon Avalanche Diodes and In-Pixel Time-to-Digital Converters

Vornicu, Ion; Vornicu, Ion; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Editura Academiei Române, 2014-01-01)
The design of a CMOS image sensor based on single-photon avalanche-diode (SPAD) array with in-pixel time-to-digital converter ...
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Towards an ultra‐low‐power low‐cost wireless visual sensor node for fine‐grain detection of forest fires

Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Leñero Bardallo, Juan Antonio; Leñero Bardallo, Juan Antonio; Kleihorst, Richard; Kleihorst, Richard; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Universidade de Coimbra, 2014-01-01)
Advances in electronics, sensor technologies, embedded hardware and software are boosting the application scenarios of ...
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Form Factor Improvement of Smart-Pixels for Vision Sensors through 3-D Vertically- Integrated Technologies

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Fernández Berni, Jorge; Fernández Berni, Jorge; Vargas Sierra, Sonia; Vargas Sierra, Sonia; Leñero Bardallo, Juan Antonio; Leñero Bardallo, Juan Antonio; Suárez Cambre, Manuel; Suárez Cambre, Manuel; Brea Sánchez, Víctor Manuel; Brea Sánchez, Víctor Manuel; Pérez Verdú, Belén; Pérez Verdú, Belén (Institute of Electrical and Electronics Engineers, 2014-01-01)
While conventional CMOS active pixel sensors embed only the circuitry required for photo-detection, pixel addressing and ...
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A CMOS 0.18μm 64×64 single photon image sensor with in-pixel 11b time-to-digital converter

Vornicu, Ion; Vornicu, Ion; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2014-01-01)
The design and characterization of a CMOS 64×64 single-photon avalanche-diode (SPAD) array with in-pixel 11b time-to-digital ...
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5×5 SPAD matrices for the study of the trade-offs between fill factor, dark count rate and crosstalk in the design of CMOS image sensors

Moreno García, Manuel; Moreno García, Manuel; Río Fernández, Rocío del; Río Fernández, Rocío del; Guerra Vinuesa, Oscar; Guerra Vinuesa, Oscar; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2014-01-01)
CMOS Single Photon Avalanche Diodes (SPADs) are a dedicated type of photodetectors that are attracting increasing interest. ...
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Focal-plane sensing-processing: a power-efficient approach for the implementation of privacy-aware networked visual sensors

Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Río Fernández, Rocío del; Río Fernández, Rocío del; Kleihorst, Richard; Kleihorst, Richard; Philips, Wilfried; Philips, Wilfried; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (MDPI, 2014-01-01)
The capture, processing and distribution of visual information is one of the major challenges for the paradigm of the ...
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In vivo measurements with a 64-channel extracellular neural recording integrated circuit

Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Pérez, Alberto; Rodríguez Pérez, Alberto; Darie, Ángela; Darie, Ángela; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Soto Sánchez, Cristina; Soto Sánchez, Cristina; Fernández Jover, Eduardo; Fernández Jover, Eduardo (Institute of Electrical and Electronics Engineers, 2014-01-01)
This paper presents in vivo measurements obtained from an implantable 64-channel neural recording Application Specific ...
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Tunable Low Noise Amplifier Implementation With Low Distortion Pseudo-Resistance for in Vivo Brain Activity Measurement

Kárász, Zoltán; Kárász, Zoltán; Fiáth, Richard; Fiáth, Richard; Földesy, Péter; Földesy, Péter; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2014-01-01)
This paper presents a low power neural signal amplifier with tunable cut-off frequencies. The presented compact amplifier, ...
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Fire detection with a frame-less vision sensor working in the NIR band

Leñero Bardallo, Juan Antonio; Leñero Bardallo, Juan Antonio; Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Häfliger, Philipp; Häfliger, Philipp; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Universidad de Coimbra, 2014-01-01)
This paper draws the attention of the community about the capabilities of an emerging generation of bio-inspired vision ...
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An ultra-low-power voltage-mode asynchronous WTA-LTA circuit

Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2013-01-01)
This paper presents an asynchronous mixed-signal WTA-LTA circuit conceived to carry out local minimummaximum indexing in ...
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A CMOS 8×8 SPAD array for Time-of-Flight measurement and light-spot statistics

Vornicu, Ion; Vornicu, Ion; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2013-01-01)
The design and simulation of a CMOS 8 × 8 single photon avalanche diode (SPAD) array is presented. The chip has been ...
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Real-time remote reporting of motion analysis with Wi-Flip

Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2012-01-01)
This paper describes a real-time application programmed into Wi-FLIP, a wireless smart camera resulting from the integration ...
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Ultralow-power processing array for image enhancement and edge detection

Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2012-01-01)
This paper presents a massively parallel processing array designed for the 0.13-μm 1.5-V standard CMOS base process of a ...
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A 176x144 148dB adaptive tone-mapping imager

Vargas Sierra, Sonia; Vargas Sierra, Sonia; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Society of Photo-Optical Instrumentation Engineers, 2012-01-01)
This paper presents a 176x144 (QCIF) HDR image sensor where visual information is simultaneously captured and adaptively ...
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Una Contribución al Diseño de Moduladores Sigma-Delta en Cascada Realizados Mediante Técnicas de Circuito en Tiempo Continuo

Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Tortosa Navas, Ramón; Tortosa Navas, Ramón (2012-01-01)
Esta tesis doctoral es el resultado de un conjunto de trabajos de investigación encaminados a sistematizar y optimizar el ...
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Control and acquisition system for a high dynamic range CMOS image sensor

Vargas Sierra, Sonia; Vargas Sierra, Sonia; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2012-01-01)
A control and acquisition system for the visualization of the images captured with a High Dynamic Range (HDR) CMOS Image ...
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CMOS SPADs selection, modeling and characterization towards image sensors implementation

Moreno García, Manuel; Moreno García, Manuel; Guerra Vinuesa, Oscar; Guerra Vinuesa, Oscar; Río Fernández, Rocío del; Río Fernández, Rocío del; Pérez Verdú, Belén; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2012-01-01)
The selection, modeling and characterization of Single Photon Avalanche Diodes (SPADs) are presented. Working with the ...
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A 148dB focal-plane tone-mapping QCIF imager

Vargas Sierra, Sonia; Vargas Sierra, Sonia; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2012-01-01)
This paper presents a QCIF HDR imager where visual information is simultaneously captured and adaptively compressed by an ...
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Power-efficient focal-plane image representation for extraction of enriched Viola-Jones features

Fernández Berni, Jorge; Fernández Berni, Jorge; Acasandrei, Laurentiu; Acasandrei, Laurentiu; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2012-01-01)
This paper describes the use of a reconfigurable focal-plane processing array in order to achieve an image representation ...
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In-pixel generation of gaussian pyramid images by block reusing in 3D-CMOS

Suárez Cambre, Manuel; Suárez Cambre, Manuel; Brea Sánchez, Víctor Manuel; Brea Sánchez, Víctor Manuel; Cabello, D.; Cabello, D.; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2012-01-01)
This paper introduces an architecture of a switched-capacitor network for Gaussian pyramid generation. Gaussian pyramids ...
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High-speed global shutter CMOS machine vision sensor with high dynamic range image acquisition and embedded intelligence

Jiménez Garrido, Francisco José; Jiménez Garrido, Francisco José; Fernández Pérez, José María; Fernández Pérez, José María; Utrera, Cayetana; Utrera, Cayetana; Muñoz, José María; Muñoz, José María; Pardo, María Dolores; Pardo, María Dolores; Giulietti, Alexander; Giulietti, Alexander; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (The International Society for Optics and Photonics, 2012-01-01)
High-speed imagers are required for industrial applications, traffic monitoring, robotics and unmanned vehicles, moviemaking, ...
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CMOS-3D smart imager architectures for feature detection

Suárez Cambre, Manuel; Suárez Cambre, Manuel; Brea Sánchez, Víctor Manuel; Brea Sánchez, Víctor Manuel; Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2012-01-01)
This paper reports a multi-layered smart image sensor architecture for feature extraction based on detection of interest ...
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A CMOS-3D reconfigurable architecture with in-pixel processing for feature detectors

Suárez Cambre, Manuel; Suárez Cambre, Manuel; Brea Sánchez, Víctor Manuel; Brea Sánchez, Víctor Manuel; Pardo, F.; Pardo, F.; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2012-01-01)
This paper introduces a two-tier CMOS-3D architecture for generation of Gaussian pyramids, detection of extrema, and ...
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A 64-channel inductively-powered neural recording sensor array

Rodríguez Pérez, Alberto; Rodríguez Pérez, Alberto; Masuch, Jens; Masuch, Jens; Rodríguez Rodríguez, José Antonio; Rodríguez Rodríguez, José Antonio; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2012-01-01)
This paper reports a 64-channel inductively powered neural recording sensor array. Neural signals are acquired, filtered, ...
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An ultralow-power mixed-signal back end for passive sensor UHF RFID transponders

Rodríguez Rodríguez, José Antonio; Rodríguez Rodríguez, José Antonio; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Masuch, Jens; Masuch, Jens; Rodríguez Pérez, Alberto; Rodríguez Pérez, Alberto; Alarcon Cot, Eduard; Alarcon Cot, Eduard; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2012-01-01)
This paper describes the design of mixed-signal back end for an ultrahigh-frequency sensor-enabled radio-frequency ...
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A Low-Power Programmable Neural Spike Detection Channel With Embedded Calibration and Data Compression

Rodríguez Pérez, Alberto; Rodríguez Pérez, Alberto; Ruiz Amaya, Jesús; Ruiz Amaya, Jesús; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2012-01-01)
This paper reports a programmable 400 μm pitch neural spike recording channel, fabricated in a 130 nm standard CMOS ...
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Early forest fire detection by vision-enabled wireless sensor networks

Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Martínez Carmona, Juan F.; Martínez Carmona, Juan F.; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (CSIRO Publishing, 2012-01-01)
Wireless sensor networks constitute a powerful technology particularly suitable for environmental monitoring. With regard ...
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Switched-capacitor networks for scale-space generation

Suárez Cambre, Manuel; Suárez Cambre, Manuel; Brea Sánchez, Víctor Manuel; Brea Sánchez, Víctor Manuel; Cabello, D.; Cabello, D.; Pozas Flores, Francisco; Pozas Flores, Francisco; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2011-01-01)
In scale-space filtering signals are represented at several scales, each conveying different details of the original signal. ...
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VISCUBE: A multi-layer vision chip

Zarandy, Akos; Zarandy, Akos; Zarandy, Akos; Zarandy, Akos; Rekeczky, Csaba; Rekeczky, Csaba; Földesy, P.; Földesy, P.; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Gergely, S.; Gergely, S.; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Roska, Tamás; Roska, Tamás (Springer Science+Business Media, 2011-01-01)
Vertically integrated focal-plane sensor-processor chip design, combining image sensor with mixed-signal and digital ...
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Wi-FLIP: A wireless smart camera based on a focal-plane low-power image processor

Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Zarandy, A.; Zarandy, A.; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2011-01-01)
This paper presents Wi-FLIP, a vision-enabled WSN node resulting from the integration of FLIP-Q, a prototype vision chip, ...
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A self-calibration circuit for a neural spike recording channel

Rodríguez Pérez, Alberto; Rodríguez Pérez, Alberto; Ruiz Amaya, Jesús; Ruiz Amaya, Jesús; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Sawan, Mohamad; Sawan, Mohamad; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2011-01-01)
This paper presents a self-calibration circuit for a neural spike recording channel. The proposed design tunes the bandwidth ...
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A power efficient neural spike recording channel with data bandwidth reduction

Rodríguez Pérez, Alberto; Rodríguez Pérez, Alberto; Ruiz Amaya, Jesús; Ruiz Amaya, Jesús; Rodríguez Rodríguez, José Antonio; Rodríguez Rodríguez, José Antonio; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2011-01-01)
This paper presents a mixed-signal neural spike recording channel which features, as an added value, a simple and low-power ...
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Demo: Real-time remote reporting of active regions with Wi-FLIP

Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Zarandy, A.; Zarandy, A.; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2011-01-01)
This paper describes a real-time application programmed into Wi-FLIP, a wireless smart camera resulting from the integration ...
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High-dynamic range tone-mapping algorithm for focal plane processors

Vargas Sierra, Sonia; Vargas Sierra, Sonia; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Roca Moreno, Elisenda; Roca Moreno, Elisenda; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (The International Society for Optics and Photonics, 2011-01-01)
This paper presents a Dynamic Range improvement technique which is specially well-suited to be implemented in Focal Plane ...
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Introduction to the special issue on the 36th European Solid-State Circuits Conference (ESSCIRC)

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Leenaerts, Domine M. W.; Leenaerts, Domine M. W.; Pineda de Gyvez, José; Pineda de Gyvez, José (Institute of Electrical and Electronics Engineers, 2011-01-01)
The 22 papers in this special issue were originally presented at the 2010 European Solid-State Circuits Conference (ESSCIRC). ...
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A focal plane processor for continuous-time 1-D optical correlation applications

Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Carranza González, Luis; Carranza González, Luis; Alexandre, B.; Alexandre, B.; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Fuente, Pablo de la; Fuente, Pablo de la; Morlanes, Tomás; Morlanes, Tomás (Springer, 2011-01-01)
This chapter describes a 1-D Focal Plane Processor, which has been designed to run continuous-time optical correlation ...
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Multi-resolution low-power Gaussian filtering by reconfigurable focal-plane binning

Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Pozas Flores, Francisco; Pozas Flores, Francisco; Zarandy, A.; Zarandy, A.; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (The International Society for Optics and Photonics, 2011-01-01)
Gaussian filtering is a basic tool for image processing. Noise reduction, scale-space generation or edge detection are ...
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Transistor-Level Synthesis of Pipeline Analog-to-Digital Converters Using a Design-Space Reduction Algorithm

Ruiz Amaya, Jesús; Ruiz Amaya, Jesús; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2011-01-01)
A novel transistor-level synthesis procedure for pipeline ADCs is presented. This procedure is able to directly map ...
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An auto-calibrated neural spike recording channel with feature extraction capabilities

Rodríguez Pérez, Alberto; Rodríguez Pérez, Alberto; Ruiz Amaya, Jesús; Ruiz Amaya, Jesús; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (The International Society for Optics and Photonics, 2011-01-01)
This paper presents a power efficient architecture for a neural spike recording channel. The channel offers a selfcalibration ...
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Focal-plane generation of multi-resolution and multi-scale image representation for low-power vision applications

Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Carranza González, Luis; Carranza González, Luis; Zarandy, A.; Zarandy, A.; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (The International Society for Optics and Photonics, 2011-01-01)
Early vision stages represent a considerably heavy computational load. A huge amount of data needs to be processed under ...
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Image filtering by reduced kernels exploiting kernel structure and focal-plane averaging

Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2011-01-01)
Incorporating multi-resolution capabilities into imagers renders additional power saving mechanisms in the subsequent image ...
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Design of a smart SiPM based on focal-plane processing elements for improved spatial resolution in PET

Pozas Flores, Francisco; Pozas Flores, Francisco; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Fernández Berni, Jorge; Fernández Berni, Jorge; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (The International Society for Optics and Photonics, 2011-01-01)
Single-photon avalanche diodes are compatible with standard CMOS. It means that photo-multipliers for scintillation detectors ...
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A QCIF 145dB imager for focal plane processor chips using a tone mapping technique in standard 0.35μm CMOS technology

Vargas Sierra, Sonia; Vargas Sierra, Sonia; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (2011-01-01)
This paper presents a QCIF HDR imager where visual information is simultaneously captured and adaptively compressed by ...
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A 3-D Chip Architecture for Optical Sensing and Concurrent Processing

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Domínguez Matas, Carlos; Domínguez Matas, Carlos; Suárez Cambre, Manuel; Suárez Cambre, Manuel; Brea Sánchez, Víctor Manuel; Brea Sánchez, Víctor Manuel; Pozas, Francisco; Pozas, Francisco; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Foldessy, Peter; Foldessy, Peter; Zarandy, Akos; Zarandy, Akos; Rekeczky, Csaba; Rekeczky, Csaba (SPIE, 2010-01-01)
This paper presents an architecture for the implementation of vision chips in 3-D integration technologies. This ...
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Digital processor array implementation aspects of a 3D multi-layer vision architecture

Földesy, Peter; Földesy, Peter; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rekeczky, Csaba; Rekeczky, Csaba; Zarandy, A.; Zarandy, A.; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Roska, Tamás; Roska, Tamás (Institute of Electrical and Electronics Engineers, 2010-01-01)
Technological aspects of the 3D integration of a multilayer combined mixed-signal and digital sensor-processor array chip ...
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Transformer based front-end for a low power 2.4 GHz transceiver

Masuch, Jens; Masuch, Jens; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2010-01-01)
A low power transceiver architecture for the 2.4 GHz ISM band using a 1.0 V supply is presented. It employs a transformer ...
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On-site forest fire smoke detection by low-power autonomous vision sensor

Fernández Berni, Jorge; Fernández Berni, Jorge; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Carranza González, Luis; Carranza González, Luis; Cano Rojas, Alberto; Cano Rojas, Alberto; Martínez Carmona, Juan F.; Martínez Carmona, Juan F.; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Morillas Castillo, Sergio; Morillas Castillo, Sergio (2010-01-01)
Early detection plays a crucial role to prevent forest fires from spreading. Wireless vision sensor networks deployed ...
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A CMOS vision system on-chip with multicore sensory processing ar- chitecture for image analysis above 1,000F/s

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Castro, Rafael; Castro, Rafael; Jiménez Garrido, Francisco José; Jiménez Garrido, Francisco José; Morillas, Sergio; Morillas, Sergio (Spie, 2010-01-01)
This paper describes a Vision-System-on-Chip (VSoC) capable of doing: image acquisition, image processing through on-chip ...
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Offset-compensated comparator with full-input range in 150nm FDSOI CMOS-3d technology

Suárez Cambre, Manuel; Suárez Cambre, Manuel; Brea Sánchez, Víctor Manuel; Brea Sánchez, Víctor Manuel; Domínguez Matas, Carlos; Domínguez Matas, Carlos; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2010-01-01)
This paper addresses an offset-compensated comparator with full-input range in the 150nm FDSOI CMOS- 3D technology from ...
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Baseband-processor for a passive UHF RFID transponder

Rodríguez Rodríguez, José Antonio; Rodríguez Rodríguez, José Antonio; Delgado Restituto, Manuel ; Delgado Restituto, Manuel ; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2010-01-01)
This paper describes the design of a digital processor targeting the Class-1 Generation-2 EPC Protocol for UHF RFID ...
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A FPP-oriented tone mapping technique for high dynamic range imagers using temporal and final exposure measurements

Vargas Sierra, Sonia; Vargas Sierra, Sonia; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Roca Moreno, Elisenda; Roca Moreno, Elisenda; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2010-01-01)
This paper presents a Dynamic Range improvement technique which is specially well-suited to be implemented in Focal Plane ...
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In-pixel ADC for a vision architecture on CMOS-3D technology

Suárez Cambre, Manuel; Suárez Cambre, Manuel; Brea Sánchez, Víctor Manuel; Brea Sánchez, Víctor Manuel; Domínguez Matas, Carlos; Domínguez Matas, Carlos; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2010-01-01)
This paper addresses the design of an 8-bit single-slope in-pixel ADC for a 3D chip architecture intended for airborne ...
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Simplified state update calculation for fast and accurate digital emulation of CNN dynamics

Pozas Flores, Francisco; Pozas Flores, Francisco; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2010-01-01)
Compared to other one-step integration methods, the 4th-order Runge-Kutta is much more accurate while still consisting in ...
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A prototype node for wireless vision sensor network applications development

Bakkali, M.; Bakkali, M.; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2010-01-01)
This paper presents a prototype vision-enabled sensor node based on a commercial vision system of reduced size and power ...
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ECCTD 2007 special issue 'bridging technology innovations to foundations'

Delgado Restituto, Manuel ; Delgado Restituto, Manuel ; Alarcón, Eduard; Alarcón, Eduard; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Wiley-Blackwell, 2009-01-01)
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3D multi-layer vision architecture for surveillance and reconnaissance applications

Földesy, Péter; Földesy, Péter; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Zarandy, A.; Zarandy, A.; Rekeczky, Csaba; Rekeczky, Csaba; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Roska, Tamás; Roska, Tamás (Institute of Electrical and Electronics Engineers, 2009-01-01)
The architecture and the design details of a multilayer combined mixed-signal and digital sensor-processor array chip is ...
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Integrated Circuitry to Detect Slippage Inspired by Human Skin and Artificial Retinas

Maldonado López, Rocío; Maldonado López, Rocío; Vidal Verdú, Fernando; Vidal Verdú, Fernando; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2009-01-01)
This paper presents a bioinspired integrated tactile coprocessor that is able to generate a warning in the case of slippage ...
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A low-power reconfigurable ADC for biomedical sensor interfaces

Rodríguez Pérez, Alberto; Rodríguez Pérez, Alberto; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2009-01-01)
This paper presents a 12-bit low-voltage low-power reconfigurable Analog-to-Digital Converter (ADC). The design employs ...
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Accurate Settling-Time Modeling and Design Procedures for Two-Stage Miller-Compensated Amplifiers for Switched-Capacitor Circuits

Ruiz Amaya, Jesús; Ruiz Amaya, Jesús; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2009-01-01)
We present modeling techniques for accurate estimation of settling errors in switched-capacitor (SC) circuits built with ...
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Insect-vision inspired collision warning vision processor for automobiles

Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Carranza González, Luis; Carranza González, Luis; Rind, Claire; Rind, Claire; Zarandy, Akos; Zarandy, Akos; Soininen, Martti; Soininen, Martti; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2008-01-01)
Vision is expected to play important roles for car safety enhancement. Imaging systems can be used to enlarging the vision ...
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Systematic design of high-resolution high-frequency cascade continuous-time sigma-delta modulators

Tortosa Navas, Ramón; Tortosa Navas, Ramón; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Roca Moreno, Elisenda; Roca Moreno, Elisenda; Castro López, Rafael; Castro López, Rafael (2008-01-01)
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La simulación eléctrica en el trabajo académicamente dirigido como vehículo docente para la enseñanza de la electrónica

Acosta Jiménez, Antonio José; Acosta Jiménez, Antonio José; Río Fernández, Rocío del; Río Fernández, Rocío del; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (2008-01-01)
La Electrónica es una disciplina versátil en cuanto a las metodologías y técnicas docentes que pueden emplearse. Frente a ...
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Matrix Methods for the Dynamic Range Optimization of Continuous-TimeGm-CFilters

Fernández Bootello, Juan Francisco; Fernández Bootello, Juan Francisco; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2008-01-01)
This paper presents a synthesis procedure for the optimization of the dynamic range of continuous-time fully differential ...
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CMOS Architectures and circuits for high-speed decision-making from image flows

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Jiménez Garrido, Francisco José; Jiménez Garrido, Francisco José; Morillas Castillo, Sergio; Morillas Castillo, Sergio; Listán, Juan; Listán, Juan; Alba, Luis; Alba, Luis; Utrera, Cayetana; Utrera, Cayetana; Romay Juárez, Rafael; Romay Juárez, Rafael; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando (The International Society for Optical Engineering (SPIE), 2008-01-01)
We present architectures, CMOS circuits and CMOS chips to process image flows at very high speed. This is achieved by ...
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Electrical-level synthesis of pipeline ADCs

Ruiz Amaya, Jesús; Ruiz Amaya, Jesús; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2008-01-01)
This paper presents a design tool for the synthesis of pipeline ADCs which is able to optimally map high-level converter ...
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Integrated circuit interface for artificial skins

Maldonado López, Rocío; Maldonado López, Rocío; Vidal Verdú, Fernando; Vidal Verdú, Fernando; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (SPIE Europe, 2007-01-01)
Artificial sensitive skins are intended to emulate the human skin to improve the skills of robots and machinery in complex ...
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A Focal-Plane Image Processor for Low Power Adaptive Capture and Analysis of the Visual Stimulus

Domínguez Matas, Carlos; Domínguez Matas, Carlos; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Sánchez Fernández, Francisco J.; Sánchez Fernández, Francisco J.; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2007-01-01)
Portable applications of artificial vision are limited by the fact that conventional processing schemes fail to meet the ...
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Accurate and simple modeling of amplifier dc gain nonlinearity in switched-capacitor circuits

Yavari, Mohammad; Yavari, Mohammad; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2007-01-01)
This paper presents an accurate and simple model for dc gain nonlinearity of operational amplifiers used in the ...
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A 5.3mW, 2.4GHz ESD protected Low-Noise Amplifier in a 0.13μm RFCMOS technology

Brandano, Davide; Brandano, Davide; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Ruiz Amaya, Jesús; Ruiz Amaya, Jesús; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2007-01-01)
An Electrostatic Discharge (ESD) protected Low- Noise Amplifier (LNA) for the 2.4 GHz ISM band designed in a 0.13 mum ...
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A design tool for high-resolution high-frequency cascade continuous- time Σ∆ modulators

Tortosa Navas, Ramón; Tortosa Navas, Ramón; Castro López, Rafael; Castro López, Rafael; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal (SPIE, 2007-01-01)
This paper introduces a CAD methodology to assist the de signer in the implementation of continuous-time (CT) cas- cade ...
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A 12-bit@40MS/s Gm-C Cascade 3-2 Continuous-Time Sigma-Delta Modulator

Tortosa Navas, Ramón; Tortosa Navas, Ramón; Aceituno, Antonio; Aceituno, Antonio; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal (Institute of Electrical and Electronics Engineers, 2007-01-01)
This paper reports the transistor-level design of a 130-nm CMOS continuous-time cascade ΣΔ modulator. The modulator topology, ...
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Double-Sampling Single-Loop EA Modulator Topologies for Broad-band Applications

Yavari, Mohammad; Yavari, Mohammad; Shoaei, Omid; Shoaei, Omid; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2006-01-01)
This paper presents novel double sampling high-order single loop sigma-delta modulator structures for wide-band applications. ...
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Tactile retina for slip detection

Maldonado López, Rocío; Maldonado López, Rocío; Vidal Verdú, Fernando; Vidal Verdú, Fernando; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Roca Moreno, Elisenda; Roca Moreno, Elisenda; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2006-01-01)
The interest in tactile sensors is increasing as their use in complex unstructured environments is demanded, like in ...
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Comparison of the DR of continuous time Gm-C filters using different structures

Fernández Bootello, Juan Francisco; Fernández Bootello, Juan Francisco; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Brandano, Davide; Brandano, Davide (World Scientific and Engineering Academy and Society, 2006-01-01)
This paper presents design techniques to evaluate the noise and distortion of continuous time Gm-C filters. Also presents ...
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Reconfiguration of Cascade ΣΔ Modulators for Multistandard GSM/Bluetooth/UIMTS/WLAN Transceivers

Morgado García de la Polavieja, Alonso; Morgado García de la Polavieja, Alonso; Río Fernández, Rocío del; Río Fernández, Rocío del; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Pérez Verdú, Belén; Pérez Verdú, Belén; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2006-01-01)
This paper presents design considerations for cascade Sigma-Delta Modulators (ΣΔMs) included in multi-standard wireless ...
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Locust-inspired vision system on chip architecture for collision detection in automotive applications

Carranza González, Luis; Carranza González, Luis; Laviana, Rubén; Laviana, Rubén; Vargas Sierra, Sonia; Vargas Sierra, Sonia; Cuadri Carvajo, Jorge; Cuadri Carvajo, Jorge; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Roca Moreno, Elisenda; Roca Moreno, Elisenda; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2006-01-01)
This paper describes a programmable digital computing architecture dedicated to process information in accordance to the ...
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Design of a 1.2-V Cascade Continuous-Time Sigma-Delta Modulator for Broadband Telecommunications

Tortosa Navas, Ramón; Tortosa Navas, Ramón; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal (Institute of Electrical and Electronics Engineers, 2006-01-01)
This paper presents the design of a continuous-time multibit cascade 2-2-1 sigma-delta modulator for broadband telecom systems.
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Double-sampled cascaded sigma-delta modulator topologies for low oversampling ratios

Yavari, Mohammad; Yavari, Mohammad; Shoaei, Omid; Shoaei, Omid; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2006-01-01)
This paper presents novel double-sampling cascaded sigma-delta modulator topologies for wideband applications. The proposed ...
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3-Layer CNN Chip for Focal-Plane Complex Dynamics with Adaptive Image Capture

Domínguez Matas, Carlos; Domínguez Matas, Carlos; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Sánchez Fernández, Francisco J.; Sánchez Fernández, Francisco J.; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2006-01-01)
This paper presents a CMOS implementation of a layered CNN concurrent with 32times32 photosensors with locally programmable ...
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Bio-inspired 0.35μm CMOS Time-to-Digital Converter with 29.3ps LSB

Mozsary, Andras; Mozsary, Andras; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Chung, Jen-Feng; Chung, Jen-Feng; Roska, Tamás; Roska, Tamás (Institute of Electrical and Electronics Engineers, 2006-01-01)
Time-to-digital converter (TDC) integrated circuit is introduced in this paper. It is based on chain of delay elements ...
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Robust symmetric multiplication for programmable analog VLSI array processing

Domínguez Matas, Carlos; Domínguez Matas, Carlos; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Sánchez Fernández, Francisco J.; Sánchez Fernández, Francisco J.; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2006-01-01)
This paper presents an electrically programmable analog multiplier. The circuit performs the multiplication between an ...
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Design of a 1.2-V 130nm CMOS 13-bit@40MS/s Cascade 2-2-1 Continuous-Time ΣΔ Modulator

Tortosa Navas, Ramón; Tortosa Navas, Ramón; Aceituno Marchena, Antonio; Aceituno Marchena, Antonio; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2006-01-01)
This paper presents the design of a continuous- time multibit cascade 2-2-1 ΣΔ modulator for broadband telecom systems. ...
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A new high-level synthesis methodology of cascaded continuous-time ΣΔ modulators

Tortosa Navas, Ramón; Tortosa Navas, Ramón; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2006-01-01)
This brief presents an efficient method for synthesizing cascaded sigma–delta modulators implemented with continuous-time ...
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A Reuse-based framework for the design of analog and mixed-signal ICs

Castro López, Rafael; Castro López, Rafael; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (The International Society for Optical Engineering -SPIE, 2005-01-01)
Despite the spectacular breakthroughs of the semiconductor industry, the ability to design integrated circuits (ICs) under ...
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Design Considerations for Multistandard Cascade ΣΔ Modulators

Morgado García de la Polavieja, Alonso; Morgado García de la Polavieja, Alonso; Río Fernández, Rocío del; Río Fernández, Rocío del; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Pérez Verdú, Belén; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (2005-01-01)
This paper discusses design considerations for cascade Sigma-Delta Modulators (ΣΔMs) included in multistandard wireless ...
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Geometrically-constrained, parasitic-aware synthesis of analog ICs

Castro López, Rafael; Castro López, Rafael; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (The International Society for Optical Engineering - SPIE, 2005-01-01)
In order to speed up the design process of analog ICs, iterations between different design stages should be avoided as ...
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A CMOS 110-dB@40-kS/s programmable-gain chopper-stabilized third-order 2-1 cascade sigma-selta modulator for low-power high-linearity automotive aensor ASICs

Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Escalera Morón, Sara; Escalera Morón, Sara; Pérez Verdú, Belén; Pérez Verdú, Belén; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Guerra Vinuesa, Oscar; Guerra Vinuesa, Oscar; Río Fernández, Rocío del; Río Fernández, Rocío del; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2005-01-01)
This paper describes a 0.35-μm CMOS chopper-stabilized switched-capacitor 2-1 cascade ΣΔ modulator for automotive sensor ...
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A 0.18 μm CMOS low noise, highly linear continuous-time seventh-order elliptic low-pass filter

Fernández Bootello, Juan Francisco; Fernández Bootello, Juan Francisco; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (The International Society for Optical Engineering- SPIE, 2005-01-01)
This paper presents a fast procedure for the system-level evaluation of noise and distortion in continuous-time integrated ...
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Behavioral Modeling, Simulation and High-Level Synthesis of Pipeline A/D Converters

Ruiz Amaya, Jesús; Ruiz Amaya, Jesús; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Delgado Restituto, Manuel ; Delgado Restituto, Manuel ; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (2005-01-01)
This paper presents a MATLAB® toolbox for the time-domain simulation and high-level sizing of pipeline analog-to-digital ...
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A Direct Synthesis Method of Cascaded Continuous-Time Sigma-Delta Modulators

Tortosa Navas, Ramón; Tortosa Navas, Ramón; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal (2005-01-01)
This paper presents an efficient method to synthesize cascaded sigma-delta modulators implemented with continuous-time ...
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Effect of Clock Jitter Error on the Performance Degradation of Multi-bit Continuous-Time ΣΔ Modulators With NRZ DAC

Tortosa Navas, Ramón; Tortosa Navas, Ramón; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal (2005-01-01)
This paper analyses the effect of the clock jitter error in multi-bit continuous-time ΣΔ modulators with non-return-to-zero ...
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ACE 16k based stand-alone system for real-time pre-processing tasks

Carranza González, Luis; Carranza González, Luis; Jiménez Garrido, Francisco José; Jiménez Garrido, Francisco José; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Roca Moreno, Elisenda; Roca Moreno, Elisenda; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (The International Society for Optical Engineering - SPIE, 2005-01-01)
This paper describes the design of a programmable stand-alone system for real time vision pre-processing tasks. The system's ...
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A mixed-signal integrated circuit for FM-DCSK modulation

Delgado Restituto, Manuel; Delgado Restituto, Manuel; Acosta Jiménez, Antonio José; Acosta Jiménez, Antonio José; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2005-01-01)
This paper presents a mixed-signal application-specific integrated circuit (ASIC) for a frequency-modulated differential ...
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On the suitability and development of layout templates for analog layout reuse and layout-aware synthesis

Castro López, Rafael; Castro López, Rafael; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (The International Society for Optical Engineering - SPIE, 2005-01-01)
Accelerating the synthesis of increasingly complex analog integrated circuits is key to bridge the widening gap between ...
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High-level synthesis of switched-capacitor, switched-current and continuous-time ΣΔ modulators using SIMULINK-based time-domain behavioral models

Ruiz Amaya, Jesús; Ruiz Amaya, Jesús; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Río Fernández, Rocío del; Río Fernández, Rocío del; Pérez Verdú, Belén; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2005-01-01)
This paper presents a high-level synthesis tool for ΣΔ Modulators (ΣΔMs) that combines an accurate SIMULINK-based time-domain ...
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Continuous-time cascaded ΣΔ modulators for VDSL: A comparative study

Tortosa Navas, Ramón; Tortosa Navas, Ramón; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal (The International Society for Optical Engineering - SPIE, 2005-01-01)
This paper describes new cascaded continuous-time ΣΔ modulators intended to cope with very high-rate digital subscriber ...
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Analysis of Clock Jitter Error in Multibit Continuous-Time ΣΔ modulators with NRZ Feedback Waveform

Tortosa Navas, Ramón; Tortosa Navas, Ramón; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal (Institute of Electrical and Electronics Engineers, 2005-01-01)
This paper presents a detailed study of the clock jitter error in multibit continuous-time ΣΔ modulators with non-return-to-zero ...
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A 0.35 μm CMOS 17-bit@40-kS/s cascade 2-1 ΣΔ modulator with programmable gain and programmable chopper stabilization

Guerra Vinuesa, Oscar; Guerra Vinuesa, Oscar; Escalera Morón, Sara; Escalera Morón, Sara; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Río Fernández, Rocío del; Río Fernández, Rocío del; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (The International Society for Optical Engineering - SPIE, 2005-01-01)
This paper describes a 0.35μm CMOS chopper-stabilized Switched-Capacitor 2-1 cascade ΣDelta; modulator for automotive ...
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An Embedded 12-bit 80MS/s A/D/A Interface for Power-Line Communications in 0.13μm Pure Digital CMOS Technology

Delgado Restituto, Manuel; Delgado Restituto, Manuel; Ruiz Amaya, Jesús; Ruiz Amaya, Jesús; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Fernández Bootello, Juan Francisco; Fernández Bootello, Juan Francisco; Díez Villar, Leila; Díez Villar, Leila; Río Fernández, Rocío del; Río Fernández, Rocío del; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2005-01-01)
This paper presents an embedded interface, comprising both A/D and D/A converters, which has been implemented in a 0.13μm ...
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A 0.18μm CMOS low-noise elliptic low-pass continuous-time filter

Fernández Bootello, Juan Francisco; Fernández Bootello, Juan Francisco; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2005-01-01)
This paper presents a seventh order low-pass continuous-time elliptic filter for use in a high-performance wireline ...
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Simulation-based high-level synthesis of Nyquist-rate data converters using MATLAB/SIMULINK

Ruiz Amaya, Jesús; Ruiz Amaya, Jesús; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (The International Society for Optical Engineering - SPIE, 2005-01-01)
This paper presents a toolbox for the simulation, optimization and high-level synthesis of Nyquist-rate Analog-to-Digital ...
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Macromodelling for analog design and robustness boosting in bio-inspired computing models

Cuadri Carvajo, Jorge; Cuadri Carvajo, Jorge; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Roca Moreno, Elisenda; Roca Moreno, Elisenda; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Society of Photo-Optical Instrumentation Engineers, 2005-01-01)
Setting specifications for the electronic implementation of biological neural-network-like vision systems on-chip is not ...
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Tactile on-chip pre-processing with techniques from artificial retinas

Maldonado López, Rocío; Maldonado López, Rocío; Vidal Verdú, Fernando; Vidal Verdú, Fernando; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Roca Moreno, Elisenda; Roca Moreno, Elisenda; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (The International Society for Optical Engineering - SPIE, 2005-01-01)
The interest in tactile sensors is increasing as their use in complex unstructured environments is demanded, like in ...
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A 1000 FPS at 128×128 vision processor with 8-bit digitized I/O

Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Jiménez Garrido, Francisco José; Jiménez Garrido, Francisco José; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Domínguez Castro, Rafael (Institute of Electrical and Electronics Engineers, 2004-01-01)
This paper presents a mixed-signal programmable chip for high-speed vision applications. It consists of an array of ...
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A CNN-driven locally adaptive CMOS image sensor

Carmona Galán, Ricardo; Carmona Galán, Ricardo; Domínguez Matas, Carlos; Domínguez Matas, Carlos; Cuadri, J.; Cuadri, J.; Jiménez Garrido, Francisco José; Jiménez Garrido, Francisco José; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2004-01-01)
A bioinspired model for mixed-signal array mimics the way in which images are processed in the visual pathway. Focal-plane ...
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Second-order neural core for bioinspired focal-plane dynamic image processing in CMOS

Carmona Galán, Ricardo; Carmona Galán, Ricardo; Jiménez Garrido, Francisco José; Jiménez Garrido, Francisco José; Domínguez Matas, Carlos; Domínguez Matas, Carlos; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Petrás, István; Petrás, István; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2004-01-01)
Based on studies of the mammalian retina, a bioinspired model for mixed-signal array processing has been implemented on ...
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ACE16K: The Third Generation of Mixed-Signal SIMD-CNN ACE Chips Toward VSoCs

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Carranza González, Luis; Carranza González, Luis; Roca Moreno, Elisenda; Roca Moreno, Elisenda; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Jiménez Garrido, Francisco José; Jiménez Garrido, Francisco José; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos (Institute of Electrical and Electronics Engineers, 2004-01-01)
Today, with 0.18-μm technologies mature and stable enough for mixed-signal design with a large variety of CMOS compatible ...
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MATLAB/SIMULINK-Based High-Level Synthesis of Discrete-Time and Continuous-Time Sigma-Delta Modulators

Ruiz Amaya, Jesús; Ruiz Amaya, Jesús; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Río Fernández, Rocío del; Río Fernández, Rocío del; Pérez Verdú, Belén; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2004-01-01)
This paper describes a tool that combines an accurate SIMULINK-based time-domain behavioural simulator with a statistical ...
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Reaction-diffusion navigation robot control: from chemical to VLSI analogic processors

Adamatzky, Andrew; Adamatzky, Andrew; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2004-01-01)
We introduce a new methodology and experimental implementations for real-time wave-based robot navigation in a complex, ...
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A 0.35μm CMOS 17-bit@40kS/s Sensor A/D Interface Based on a Programmable-Gain Cascade 2-1 ΣΔ Modulator

García González, José Manuel; García González, José Manuel; Escalera Morón, Sara; Escalera Morón, Sara; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Guerra Vinuesa, Oscar; Guerra Vinuesa, Oscar; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Río Fernández, Rocío del; Río Fernández, Rocío del; Pérez Verdú, Belén; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2004-01-01)
This paper describes the design and electrical implementation of an A/D interface for sensor applications realized in a ...
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An Optimization-based Tool for the High-Level Synthesis of Discrete-time and continuous-Time Sigma-Delta Modulators in the MATLAB/SIMULINK Environment

Ruiz Amaya, Jesús; Ruiz Amaya, Jesús; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Río Fernández, Rocío del; Río Fernández, Rocío del; Pérez Verdú, Belén; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2004-01-01)
This paper presents a MATLAB toolbox for the automated high-level sizing of ΣΔ Modulators (ΣΔMs) based on the combination ...
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Highly Linear 2,5-V CMOS ΣΔ Modulator for ADSL+

Río Fernández, Rocío del; Río Fernández, Rocío del; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Pérez Verdú, Belén; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2004-01-01)
We present a 90-dB spurious-free dynamic range sigma–delta modulator (ΣΔM) for asymmetric digital subscriber line applications ...
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An Alternative DfT Methodology to Test High-Resolution ΣΔ Modulators

Escalera Morón, Sara; Escalera Morón, Sara; García González, José Manuel; García González, José Manuel; Guerra Vinuesa, Oscar; Guerra Vinuesa, Oscar; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Pérez Verdú, Belén; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2004-01-01)
In this paper, a novel DfT methodology to test high-resolution ΣΔ Modulators (ΣΔM) is introduced. The aim of the proposal ...
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Analysis of error mechanisms in switched-current Sigma-Delta modulators

Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Pérez Verdú, Belén; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Río Fernández, Rocío del; Río Fernández, Rocío del; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Springer, 2004-01-01)
This paper presents a systematic analysis of the major switched-current (SI) errors and their influence on the performance ...
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A mixed-signal early vision chip with embedded image and programming memories and digital I/O

Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos (The International Society for Optical Engineering - SPIE, 2003-01-01)
From a system level perspective, this paper presents a 128 × 128 flexible and reconfigurable Focal-Plane Analog Programmable ...
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Neuro-fuzzy chip to handle complex tasks with analog performance

Navas González, Rafael; Navas González, Rafael; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Vidal Verdú, Fernando; Vidal Verdú, Fernando (Institute of Electrical and Electronics Engineers (IEEE), 2003-01-01)
This Paper presents a mixed-signal neuro-fuzzy controller chip which, in terms of power consumption, input-output delay ...
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Design Considerations for an Automotive Sensor Interface Sigma-Delta Modulator

Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Río Fernández, Rocío del; Río Fernández, Rocío del; Pérez Verdú, Belén; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2003-01-01)
The Sigma-Delta Modulator presented in this paper contains a programmable-gain input inferface to accommodate the output ...
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On the development of a MODEM for data transmission and control of electrical household appliances using the low-voltage power-line

Escalera Morón, Sara; Escalera Morón, Sara; Domínguez Matas, Carlos; Domínguez Matas, Carlos; García González, José Manuel; García González, José Manuel; Guerra Vinuesa, Oscar; Guerra Vinuesa, Oscar; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2003-01-01)
This paper presents a CMOS 0,6μm mixed-signal MODEM ASIC for data transmission on the low-voltage power line. The circuit ...
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A Bio-Inspired Two-Layer Mixed-Signal Flexible Programmable Chip for Early Vision

Carmona Galán, Ricardo; Carmona Galán, Ricardo; Jiménez Garrido, Francisco José; Jiménez Garrido, Francisco José; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Roska, Tamás; Roska, Tamás; Rekeczky, Csaba; Rekeczky, Csaba; Petrás, István; Petrás, István; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2003-01-01)
A bio-inspired model for an analog programmable array processor (APAP), based on studies on the vertebrate retina, has ...
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Analog weight buffering strategy for CNN chips

Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Domínguez Castro, Rafael (Institute of Electrical and Electronics Engineers, 2003-01-01)
Large, gray-scale CNN chips employ analog signals to achieve high-density in the internal distribution of the template ...
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Exploration of spatial-temporal dynamic phenomena in a 32×32-cell stored program two-layer CNN universal machine chip prototype

Petrás, István; Petrás, István; Rekeczky, Csaba; Rekeczky, Csaba; Roska, Tamás; Roska, Tamás; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Jiménez Garrido, Francisco José; Jiménez Garrido, Francisco José; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (World Scientific Publishing, 2003-01-01)
This paper describes a full-custom mixed-signal chip that embeds digitally programmable analog parallel processing and ...
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A ΣΔ modulator for a programmable-gain, low-power, high-linearity automotive sensor interface

Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Pérez Verdú, Belén; Pérez Verdú, Belén; Río Fernández, Rocío del; Río Fernández, Rocío del; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (The International Society for Optical Engineering - SPIE, 2003-01-01)
This paper describes the design and electrical implementation of a 0.35μm CMOS 17-bit≰0kS/s Sigma-Delta Modulator (ΣΔM) ...
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A versatile sensor interface for programmable vision systems-on-chip

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Roca Moreno, Elisenda; Roca Moreno, Elisenda; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Domínguez Castro, Rafael (The International Society for Optical Engineering - SPIE, 2003-01-01)
This paper describes an optical sensor interface designed for a programmable mixed-signal vision chip. This chip has been ...
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Expandible high-order cascade ya modulator with constant, reduced systematic loss of resolution

Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Río Fernández, Rocío del; Río Fernández, Rocío del; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2003-01-01)
An arbitrary order sigma-delta modulator cascude architecture is presented with only I-bit loss of resolution due to scaling ...
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Accurate VHDL-based simulation of Sigma Delta modulators

Castro López, Rafael; Castro López, Rafael; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2003-01-01)
The computational cost of transient simulation of /spl Sigma//spl Delta/ modulators (/spl Sigma//spl Delta/Ms) at the ...
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A SIMULINK-based approach for fast and precise simulation of switched-capacitor, switched-current and continuous-time /spl Sigma//spl Delta/ modulators

Moreno Reina, Javier; Moreno Reina, Javier; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Romay, Rafael; Romay, Rafael; Río Fernández, Rocío del; Río Fernández, Rocío del; Pérez Verdú, Belén; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2003-01-01)
This paper describes how to extend the capabilities of SIMULINK for the time-domain simulation of /spl Sigma//spl Delta/ ...
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A 2.5-V CMOS Wideband Sigma-Delta Modulator

Río Fernández, Rocío del; Río Fernández, Rocío del; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2003-01-01)
A high-performance Sigma-Delta modulator for wireline communication applications is presenfed It employs a 4th-order cascade ...
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System-level optimization of baseband filters for communication applications

Fernández Bootello, Juan Francisco; Fernández Bootello, Juan Francisco; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (The International Society for Optical Engineering - SPIE, 2003-01-01)
In this paper, a design approach for the high-level synthesis of programmable continuous-time baseband filters able to ...
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Programmable retinal dynamics in a CMOS mixed-signal array processor chip

Carmona Galán, Ricardo; Carmona Galán, Ricardo; Jiménez Garrido, Francisco José; Jiménez Garrido, Francisco José; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (The International Society for Optical Engineering - SPIE, 2003-01-01)
The low-level image processing that takes place in the retina is intended to compress the relevant visual information to ...
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Towards a computational approach for collision avoidance with real-world scenes

Keil, Matthias Sven; Keil, Matthias Sven; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (SPIE- The International Society for Optical Engineering, 2003-01-01)
In the central nervous systems of animals like pigeons and locusts, neurons were identified which signal objects approaching ...
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CMOS mixed-signal MODEM for data transmission and control of electrical household appliances using the low-voltage power-line

Escalera Morón, Sara; Escalera Morón, Sara; Domínguez Matas, Carlos; Domínguez Matas, Carlos; García González, José Manuel; García González, José Manuel; Guerra Vinuesa, Oscar; Guerra Vinuesa, Oscar; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (The International Society for Optical Engineering - SPIE, 2003-01-01)
This paper presents a CMOS 0.6μm mixed-signal MODEM ASIC for data transmission using the low-voltage power line. This ...
Chapter of Book
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BandPass Sigma-Delta Analog-to-Digital Converters

Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Pérez Verdú, Belén; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Río Fernández, Rocío del; Río Fernández, Rocío del; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Springer, 2003-01-01)
The principle of ΣΔ Modulation (ΣΔM) is extended in BPΣΔMs to bandpass signals, especially but not only, with a narrow ...
PhD Thesis
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Análisis y diseño de hardware VLSI basado en CNNs para el procesamiento de imágenes en tiempo-real

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Carmona Galán, Ricardo; Carmona Galán, Ricardo (2002-06-10)
Durante las últimas décadas del siglo XX hemos asistido a dos oleadas revolucionarias sucesivas en el ámbito del tratamiento ...
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Generation of technology-portable flexible analog blocks

Castro López, Rafael; Castro López, Rafael; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2002-01-01)
This paper introduces a complete methodology for retargeting of analog blocks to different sets of specifications, even ...
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Mismatch-induced tradeoffs and scalability of mixed-signal vision chips

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Domínguez Castro, Rafael (Institute of Electrical and Electronics Engineers, 2002-01-01)
This paper explores different trade-offs associated with the design of analog VLSI chips. These trade-offs are related to ...
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Bio-inspired analog parallel array processor chip with programmable spatio-temporal dynamics

Carmona Galán, Ricardo; Carmona Galán, Ricardo; Jiménez Garrido, Francisco José; Jiménez Garrido, Francisco José; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2002-01-01)
A bio-inspired model for an analog parallel array processor (APAP), based on studies on the vertebrate retina, permits the ...
Presentation
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A 2.5-V ΣΔ modulator in 0.25-um CMOS for ADSL

Río Fernández, Rocío del; Río Fernández, Rocío del; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2002-01-01)
This paper presents a dual-quantization SC Sigma-Delta Modulator intended for A/D Conversion in ADSL applications.
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CMOS design of cellular APAPs and FPAPAPs: an overview

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2002-01-01)
CNN-based analog visual microprocessors have similarities with the so-called Single Instruction Multiple Data systems, ...
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Integrated chaos generators

Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2002-01-01)
This paper surveys the different design issues, from mathematical model to silicon, involved on the design of integrated circuits for the generation of chaotic behavior.
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A processing element architecture for high-density focal plane analog programmable array processors

Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2002-01-01)
The architecture of the elementary Processing Element - PE- used in a recently designed 128×128 Focal Plane Analog ...
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A multimode gray-scale CMOS optical sensor for visual computers

Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Roca Moreno, Elisenda; Roca Moreno, Elisenda (Institute of Electrical and Electronics Engineers, 2002-01-01)
This paper presents a new multimode optical sensor architecture for the optical interface of Visual CNN (cellular neural ...
PhD Thesis
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Diseño de chips programables de señal mixta con bajo consumo de potencia para sistemas de visión en tiempo real

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo (2002-01-01)
Las Tecnologías de la información y de las Comunicaciones han progresado de forma vertiginosa durante los últimos años. ...
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ACE16K: A 128×128 focal plane analog processor with digital I/O

Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Domínguez Castro, Rafael (Institute of Electrical and Electronics Engineers, 2002-01-01)
This paper presents a new generation 128×128 focal-plane analog programmable array processor (FPAPAP), from a system level ...
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Toward visual microprocessors

Roska, Tamás; Roska, Tamás; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2002-01-01)
This paper outlines motivations and models underlying the design of visual microprocessors based on the cellular neural ...
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CMOS realization of a 2-layer CNN universal machine chip

Carmona Galán, Ricardo; Carmona Galán, Ricardo; Jiménez Garrido, Francisco José; Jiménez Garrido, Francisco José; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2002-01-01)
Some of the features of the biological retina can be modelled by a cellular neural network (CNN) composed of two dynamically ...
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A complete retargeting methodology for mixed-signal IC designs

Castro López, Rafael; Castro López, Rafael; Fernández, F. V.; Fernández, F. V.; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2001-01-01)
In this paper, an efficient methodology to retargeting and reuse of embedded mixed-signal blocks is presented. Parametrized ...
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Analysis and Modeling of the Non-Linear Sampling Process in Switched-Current Circuits - Application to Bandpass Sigma-Delta Modulators

Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Pérez Verdú, Belén; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Río Fernández, Rocío del; Río Fernández, Rocío del; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (2001-01-01)
This paper presents a precise model for the transient behaviour of Fully Differential (FD) SwItched-current (SI) memory ...
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Mixed-signal map-configurable integrated chaos generator for digital communication systems

Delgado Restituto, Manuel ; Delgado Restituto, Manuel ; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (2001-01-01)
In this paper, the methodological aspects for the design of mixed-signal map-configurable chaos generators are presented. ...
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Effect of Non-Linear Settling Error on The Harmonic Distortion of Fully-Differential Switched-Current BandPass Sigma-Delta Modulators

Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Pérez Verdú, Belén; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Río Fernández, Rocío del; Río Fernández, Rocío del; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2001-01-01)
This paper presents a detailed study of the effect of the non-linear settling on the harmonic distortion of BandPass SD ...
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Analysis and Experimental Characterization of Idle Tones in 2nd-Order Bandpass Sigma-Delta Modulators - A 0.8μm CMOS Switched-Current Case Study

Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Pérez Verdú, Belén; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Río Fernández, Rocío del; Río Fernández, Rocío del; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2001-01-01)
Ths paper analyses the tonal behaviour of the quantization noise in 2nd-order bandpass SD modulators. The analysis previously ...
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High-performance ΣΔ ADC for ADSL applications in 0.35μm CMOS digital technology

Río Fernández, Rocío del; Río Fernández, Rocío del; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Pérez Verdú, Belén; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2001-01-01)
We present a ΣΔ modulator designed for ADSL applications in a 0.3Sμm CMOS pure digital technology. It employs a 4th-order ...
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Study of Non-Linear S/H Operation in Switched-Current Circuits Using Volterra Series - Application to BandPass Sigma-Delta Modulators

Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Pérez Verdú, Belén; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Río Fernández, Rocío del; Río Fernández, Rocío del; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (2001-01-01)
This paper analyses the transient behaviour of SwItched-current (SI) memory cells placed at the front-end of high-speed ...
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Top-Down Design of a xDSL 14-bit 4MSh ZA Modulator in Digital CMOS Technology

Río Fernández, Rocío del; Río Fernández, Rocío del; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Pérez Verdú, Belén; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2001-01-01)
This paper describes the design of a Sigma-Delta modulator aimed for A/D conversion in xDSL applications, featuring ...
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ACE16k: A programmable focal plane vision processor with 128 x 128 resolution

Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (European Conference on Circuit Theory and Design, 2001-01-01)
This paper presents a new generation 128x128 Focal Plane Analog Programmable Array Processor (FPAPAP), from a system ...
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A behavioral modeling concept and practice of CNN-UM VLSI implementations

Földesy, Péter; Földesy, Péter; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2001-01-01)
In this paper we introduce a novel simulation time bounded behavioral modeling technique that optimally selects the ...
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Realization of non-linear templates using the CNNUC3 prototype

Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Foldesy, Péter; Foldesy, Péter; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Domínguez Castro, Rafael (Institute of Electrical and Electronics Engineers, 2000-01-01)
Demonstrates the processing capabilities of an analog programmable array processor chipMINUS/CNNUC3-which follows the ...
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CNN technology in action

Zarandy, Akos; Zarandy, Akos; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Foldesy, Péter; Foldesy, Péter; Kek, Laszlo; Kek, Laszlo; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Rekeczky, Csaba; Rekeczky, Csaba; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Roska, Tamás; Roska, Tamás; Szatmári, István; Szatmári, István; Sziranyi, Tamas; Sziranyi, Tamas; Szolgay, Péter; Szolgay, Péter (Institute of Electrical and Electronics Engineers, 2000-01-01)
Two Cellular Neural Net Universal Machine (CNN-UM) prototypes are demonstrated in action. The first one is the latest 4096 ...
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A stored program 2/sup nd/ order/3-layer complex cell CNN-UM

Rekeczky, Csaba; Rekeczky, Csaba; Serrano Gotarredona, María Teresa; Serrano Gotarredona, María Teresa; Roska, Tamás; Roska, Tamás; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2000-01-01)
A stored program 2/sup nd/ order/3-layer complex cell cellular neural network Universal Machine (CNN-UM) architecture is ...
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Experimental Characterization of IdleTones in Second-Order Bandpass ΣΔ Modulators

Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Pérez Verdú, Belén; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Río Fernández, Rocío del; Río Fernández, Rocío del; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (2000-01-01)
This paper analyses the tonal behaviour of the quantization noise in second-order bandpass ΣΔ modulators. The analysis ...
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Reliable analysis of settling errors in SC integrators-application to the design of high-speed /spl Sigma//spl Delta/ modulators

Río Fernández, Rocío del; Río Fernández, Rocío del; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Pérez Verdú, Belén; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2000-01-01)
This paper presents a detailed study on the transient response of SC integrators which takes into account the effects of ...
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Experimental demonstration of real-time image-processing using a VLSI analog programmable array processor

Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Roca Moreno, Elisenda; Roca Moreno, Elisenda; Foldesy, Péter; Foldesy, Péter; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (SPIE- The International Society for Optical Engineering, 2000-01-01)
This paper describes a full-custom mixed-signal chip which embeds distributed optical signal acquisition, digitallyprogrammable analog ...
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A CMOS 0.8- µm transistor-only 1.63-MHz switched-current bandpass ΣΔ modulator for AM signal A/D conversion

Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Pérez Verdú, Belén; Río Fernández, Rocío del; Río Fernández, Rocío del; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2000-01-01)
This paper presents a CMOS 0.8-/spl mu/m switched-current (SI) fourth-order bandpass /spl Sigma//spl Delta/ modulator ...
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Implementation of non-linear templates using a decomposition technique by a 0.5 /spl mu/m CMOS CNN universal chip

Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Foldesy, Péter; Foldesy, Péter; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Domínguez Castro, Rafael (Institute of Electrical and Electronics Engineers, 2000-01-01)
This paper demonstrates the processing capabilities of a recently designed analog programmable array processor. This new ...
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A mixed-signal fuzzy controller and its application to soft start of DC motors

Navas González, Rafael; Navas González, Rafael; Vidal Verdú, Fernando; Vidal Verdú, Fernando; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2000-01-01)
Presents a mixed-signal fuzzy controller chip and its application to control of DC motors. The controller is based on a ...
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High-order cascade multibit /spl Sigma//spl Delta/ modulators for xDSL applications

Río Fernández, Rocío del; Río Fernández, Rocío del; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Pérez Verdú, Belén; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2000-01-01)
This paper explores the use of /spl Sigma//spl Delta/ modulators for A/D conversion in xDSL applications. Two high-order ...
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A 14-bit 4-MS/s Multi-bit Cascade Sigma-Delta Modulator in CMOS 0.35-um Digital Technology

Río Fernández, Rocío del; Río Fernández, Rocío del; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (2000-01-01)
This paper presents a 4th-order 3-stage cascade SD modulator that achieves 14-bit dynamic range at 4MS/s using low ...
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An error-controlled methodology for approximate hierarchical symbolic analysis

Guerra Vinuesa, Oscar; Guerra Vinuesa, Oscar; Rodríguez García, Juan D.; Rodríguez García, Juan D.; Roca Moreno, Elisenda; Roca Moreno, Elisenda; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2000-01-01)
Limitations of existing approaches for symbolic analysis of large analog circuits are discussed. To address their solution, ...
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Object oriented image segmentation on the CNNUC3 chip

Földesy, Péter; Földesy, Péter; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Domínguez Castro, Rafael (Institute of Electrical and Electronics Engineers, 2000-01-01)
We show how a complex object oriented image analysis algorithm can be implemented on a CNNUM chip for video-coding. Besides ...
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Review of CMOS implementations of the CNN universal machine-type visual microprocessors

Roska, Tamás; Roska, Tamás; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2000-01-01)
While in most application areas digital processors can solve problems initially, in some fields their capabilities are ...
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Structure reconfigurability of the CNNUC3 for robust template operation

Földesy, Péter; Földesy, Péter; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Domínguez Castro, Rafael (Institute of Electrical and Electronics Engineers, 2000-01-01)
We demonstrate the importance of the reconfigurability of a 64/spl times/64 cells size CNN-UM chip. As we show, in such a ...
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A hierarchical approach for the symbolic analysis of large analog integrated circuits

Guerra Vinuesa, Oscar; Guerra Vinuesa, Oscar; Roca Moreno, Elisenda; Roca Moreno, Elisenda; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (IEEE computer society digital library, 2000-01-01)
This paper introduces a new hierarchical analysis methodology which incorporates approximation strategies during the ...
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Selection of test techniques for high-resolution ΣΔ modulators

Guerra Vinuesa, Oscar; Guerra Vinuesa, Oscar; Escalera Morón, Sara; Escalera Morón, Sara; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Compaigne, Eric; Compaigne, Eric; Galliard, Christophe; Galliard, Christophe; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (2000-01-01)
This paper introduces a new tool which allows the evaluation of different test techniques in a complete impartial manner. ...
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Programmable resolution imager for imaging applications

Roca Moreno, Elisenda; Roca Moreno, Elisenda; Soriano Pastor, Germán; Soriano Pastor, Germán; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (SPIE- The International Society for Optical Engineering, 2000-01-01)
In this paper a programmable imager with averaging capabilities will be described which is intended for averaging of ...
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The CNNUC3: an analog I/O 64x64 CNN universal machine chip prototype with 7-bit analog accuracy

Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2000-01-01)
This paper describes a full-custom mixed-signal chip which embeds distributed optical signal acquisition, digitally-programmable ...
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Error control in simplification before generation algorithms for symbolic analysis of large analogue circuits

Rodríguez García, Juan D.; Rodríguez García, Juan D.; Guerra Vinuesa, Oscar; Guerra Vinuesa, Oscar; Roca Moreno, Elisenda; Roca Moreno, Elisenda; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institution of Engineering and Technology, 1999-01-01)
Circuit reduction is a fundamental first step in addressing the symbolic analysis of large analogue circuits. A new algorithm ...
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Reliable analysis of settling errors in SC integrators - application to high-speed low-power ΣΔ modulators design

Río Fernández, Rocío del; Río Fernández, Rocío del; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Pérez Verdú, Belén; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (1999-01-01)
This paper presents a detailed study on the transient response of SC integrators taking into account the effects of amplifier ...
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An accurate error control mechanism for simplification before generation algorithms

Guerra Vinuesa, Oscar; Guerra Vinuesa, Oscar; Rodríguez García, Juan D.; Rodríguez García, Juan D.; Roca Moreno, Elisenda; Roca Moreno, Elisenda; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1999-01-01)
The use of simplification before generation techniques to enable the approximate symbolic analysis of large analog circuits ...
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A mixed-signal architecture for high complexity CMOS fuzzy controlers

Navas-González, L.; Navas-González, L.; Vidal Verdú, Fernando; Vidal Verdú, Fernando; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Universidad de Granada: Departamento de Ciencias de la Computación e Inteligencia Artificial, 1999-01-01)
Analog circuits provide better area/power efficiency than their digital counterparts for low-medium precision requirements ...
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SIRENA: A CAD environment for behavioural modelling and simulation of VLSI cellular neural network chips

Carmona Galán, Ricardo; Carmona Galán, Ricardo; García Vargas, Ignacio; García Vargas, Ignacio; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Wiley-Blackwell, 1999-01-01)
This paper presents SIRENA, a CAD environment for the simulation and modelling of mixed-signal VLSI parallel processing ...
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Harmonic Distortion in Fully-Differential Switched-Current Sigma-Delta Modulators

Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Pérez Verdú, Belén; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Río Fernández, Rocío del; Río Fernández, Rocío del; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (1999-01-01)
This paper presents a systematic analysis of the harmonic distortion in SD modulators (SDMs) implemented with fully-differential ...
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On the Design of Second Order Dynamics Reaction-Diffusion CNNs

Serrano Gotarredona, María Teresa; Serrano Gotarredona, María Teresa; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Springer, 1999-01-01)
In this paper, a second order reaction-diffusion equation has been identified which is able to reproduce through parameter ...
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A modular programmable CMOS analog fuzzy controller chip

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Navas González, Rafael; Navas González, Rafael; Delgado Restituto, Manuel ; Delgado Restituto, Manuel ; Vidal Verdú, Fernando; Vidal Verdú, Fernando (Institute of Electrical and Electronics Engineers, 1999-01-01)
We present a highly modular fuzzy inference analog CMOS chip architecture with on-chip digital progranirnability. This ...
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RAPID-retargetability for reusability of application-driven quadrature D/A interface block design

Franca, J.; Franca, J.; Horta, N.; Horta, N.; Pereira, M.; Pereira, M.; Vital, J.; Vital, J.; Castro López, Rafael; Castro López, Rafael; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Ramos, J.; Ramos, J.; Santos, P.; Santos, P. (Institute of Electrical and Electronics Engineers, 1999-01-01)
This paper describes ESPRIT 29648, concerning the development of an advanced methodology for the design of a mixed-signal ...
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An 0.5-μm CMOS analog random access memory chip for TeraOPS speed multimedia video processing

Carmona Galán, Ricardo; Carmona Galán, Ricardo; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Roska, Tamás; Roska, Tamás; Kozek, Tibor; Kozek, Tibor; Chua, Leon O.; Chua, Leon O. (Institute of Electrical and Electronics Engineers, 1999-01-01)
Data compressing, data coding, and communications in object-oriented multimedia applications like telepresence, computer-aided ...
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Non-ideal quantization noise shaping in switched-current bandpass ΣΔ modulators

Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Pérez Verdú, Belén; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Río Fernández, Rocío del; Río Fernández, Rocío del; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1999-01-01)
This paper presents a systematic analysis of the major switched-current (SI) errors and their influence on the quantization ...
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A 13-bit, 2.2-MS/s, 55-mW multibit cascade ΣΔ modulator in CMOS 0.7-μm single-poly technology

Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Pérez Verdú, Belén; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1999-01-01)
This paper presents a CMOS 0.7-μm ΣΔ modulator IC that achieves 13-bit dynamic range at 2.2 MS/s with an oversampling ratio ...
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Design considerations for integrated continuous-time chaotic oscillators

Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1998-01-01)
This paper presents an optimization procedure to choose the chaotic state equation which is best suited for implementation ...
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A multiplexed mixed-signal fuzzy architecture

Vidal Verdú, Fernando; Vidal Verdú, Fernando; Navas González, Rafael; Navas González, Rafael; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1998-01-01)
Analog circuits provide better area/power efficiency than their digital counterparts for low-medium precision requirements. ...
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Multi-bit cascade ΣΔ modulator for high-speed A/D conversion with reduced sensitivity to DAC errors

Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Pérez Verdú, Belén; Pérez Verdú, Belén; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1998-01-01)
This paper presents a ΣΔ modulator (ΣΔM) which combines single-bit and multi-bit quantization in a cascade architecture ...
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Mixed signal CMOS high precision circuits for on chip learning

Vidal Verdú, Fernando; Vidal Verdú, Fernando; Navas González, Rafael; Navas González, Rafael; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1998-01-01)
Learning algorithms have become of great interest to be applied not only to neural or hybrid neuro-fuzzy systems, but also ...
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Symbolic analysis of large analog integrated circuits: the numerical reference generation problem

Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Guerra Vinuesa, Oscar; Guerra Vinuesa, Oscar; Rodríguez García, Juan D.; Rodríguez García, Juan D.; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (IEEE press, 1998-01-01)
Symbolic analysis potentialities for gaining circuit insight and for efficient repetitive evaluations have been limited ...
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Multiplexing architecture for mixed-signal CMOS fuzzy controllers

Vidal Verdú, Fernando; Vidal Verdú, Fernando; Navas González, Rafael; Navas González, Rafael; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1998-01-01)
Limited precision imposes limits on the complexity of analogue circuits, and hence fuzzy analogue controllers are usually ...
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Challenges in mixed-signal IC design of CNN chips in submicron CMOS

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos (Institute of Electrical and Electronics Engineers, 1998-01-01)
Summary form only given. The contrast observed between the performance of artificial vision machines and "natural" vision ...
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Four-quadrant one-transistor-synapse for high-density CNN implementations

Domínguez Castro, Rafael; Domínguez Castro, Rafael; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Carmona Galán, Ricardo; Carmona Galán, Ricardo (Institute of Electrical and Electronics Engineers, 1998-01-01)
Presents a linear four-quadrants, electrically-programmable, one-transistor synapse strategy applicable to the implementation ...
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High-order cascade multi-bit Σ∆ modulators for high-speed A/D conversion

Río Fernández, Rocío del; Río Fernández, Rocío del; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Pérez Verdú, Belén; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Universidad Carlos III, 1998-01-01)
The use of Sigma-Delta (Σ∆) modulation for analog-to-digital conversion (ADC) in the communication frequency range is ...
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Behavioral modeling of PWL analog circuits using symbolic analysis

Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Pérez Verdú, Belén; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1998-01-01)
Behavioral models are used both for top-down design and for bottom-up verification. During top-down design, models are ...
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Integrated circuit blocks for a DCSK chaos radio

Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Porra, Veikko; Porra, Veikko (Institute of Electrical and Electronics Engineers, 1998-01-01)
A proposal for an integrated digital communication system using a DCSK chaotic modulation scheme is presented. It is a ...
Presentation
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Practical considerations for the design of cascade multi-bit high-frequency /spl Sigma//spl Delta/ modulators

Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Río Fernández, Rocío del; Río Fernández, Rocío del; Pérez Verdú, Belén; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1998-01-01)
Recommendations are given for efficient design of high-frequency /spl Sigma//spl Delta/ modulators using multi-stage ...
Article
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A CMOS 0.8 μm fully differential current mode buffer for HF SI circuits

Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Pérez Verdú, Belén; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Elsevier, 1998-01-01)
We present a high-frequency fully-differential current-mode buffer to interface off-chip currents with no significant ...
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A 0.5 /spl mu/m CMOS CNN analog random access memory chip for massive image processing

Carmona Galán, Ricardo; Carmona Galán, Ricardo; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Roska, Tamás; Roska, Tamás; Kozek, Tibor; Kozek, Tibor; Chua, Leon O.; Chua, Leon O. (Institute of Electrical and Electronics Engineers, 1998-01-01)
An analog RAM has been designed to act as a cache memory for a CNN Universal Machine. Hence, all the non-standard chips ...
Article
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Fourth-order cascade SC ΣΔ modulators: a comparative study

Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Pérez Verdú, Belén; Pérez Verdú, Belén; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1998-01-01)
Fourth-order cascade ΣΔ modulators are very well suited for IC implementation using analog sampled-data circuits because ...
Article
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Electrooptical measurement system for the DC characterization of visible detectors for CMOS-compatible vision chips

Roca Moreno, Elisenda; Roca Moreno, Elisenda; Frutos Rayego, Fabián; Frutos Rayego, Fabián; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (IEEE, 1998-01-01)
Abstract—An electrooptical measurement system for the dc characterization of visible detectors for CMOS-compatible ...
PhD Thesis
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Una técnica para el análisis de la variabilidad estadística en circuitos integrados analógicos

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Rodríguez Macías, Rafael; Rodríguez Macías, Rafael (1997-10-06)
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Robust high-accuracy high-speed continuous-time CMOS current comparator

Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Río Fernández, Rocío del; Río Fernández, Rocío del; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institution of Engineering and Technology, 1997-01-01)
The authors present a CMOS current comparator which employs nonlinear negative feedback to obtain high-accuracy (down to ...
Presentation
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A modular CMOS analog fuzzy controller

Vidal Verdú, Fernando; Vidal Verdú, Fernando; Navas González, Rafael; Navas González, Rafael; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1997-01-01)
The low/medium precision required for many fuzzy applications makes analog circuits natural candidates to design fuzzy ...
Presentation
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Quantization noise shaping degradation in switched-current bandpass sigma-delta modulators

Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Pérez Verdú, Belén; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (1997-01-01)
Presentation
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An algorithm for numerical reference generation in symbolic analysis of large analog circuits

García Vargas, Ignacio; García Vargas, Ignacio; Galán, Mariano; Galán, Mariano; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1997-01-01)
This paper addresses the problems arising in the calculation of numerical references (network function coefficients), ...
Presentation
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Discrete-time integrated circuits for chaotic communication

Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1997-01-01)
This paper gives design considerations for the synthesis of analog discrete-time encoder-decoder pairs based on digital ...
Article
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Bifurcations and synchronization using an integrated programmable chaotic circuit

Delgado Restituto, Manuel ; Delgado Restituto, Manuel ; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Ceballos Cáceres, Joaquín Francisco; Ceballos Cáceres, Joaquín Francisco; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (World Scientific Publishing, 1997-01-01)
This paper presents a CMOS chip which can act as an autonomous stand-alone unit to generate different real-time chaotic ...
Article
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A 0.8-μm CMOS two-dimensional programmable mixed-signal focal-plane array processor with on-chip binary imaging and instructions storage

Domínguez Castro, Rafael; Domínguez Castro, Rafael; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Földesy, Péter; Földesy, Péter; Zarándy, Ákos; Zarándy, Ákos; Szolgay, Péter; Szolgay, Péter; Szirányi, Tamás; Szirányi, Tamás; Roska, Tamás; Roska, Tamás (Institute of Electrical and Electronics Engineers, 1997-01-01)
This paper presents a CMOS chip for the parallel acquisition and concurrent analog processing of two-dimensional (2-D) ...
Presentation
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Design of a programmable mixed-signal CMOS image-processing chip in 0.8 /spl mu/m CMOS

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Carmona Galán, Ricardo; Carmona Galán, Ricardo (Institute of Electrical and Electronics Engineers, 1997-01-01)
An operational vision-chip prototype with a wide-range of potential applications in artificial-vision systems is presented. ...
Presentation
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A 2.5MHz 55dB Switched-Current BandPass ΣΔ Modulator for AM Signal Conversion

Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Pérez Verdú, Belén; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1997-01-01)
We present a Switched-Current (SI) fourth-order bandpass ΣΔ modulator IC prototype. It uses fully-differential circuits ...
Presentation
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Mismatch distance term compensation in centroid configurations with nonzero-area devices

Sánchez Karhunen, Eduardo; Sánchez Karhunen, Eduardo; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1997-01-01)
This paper presents an analytical approach to distance term compensation in mismatch models of integrated devices. Firstly, ...
Chapter of Book
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Tools for Automated Design of ΣΔ Modulators

Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Springer, 1997-01-01)
We present a set of CAD tools to design ΣΔ modulators. They use statistical optimization to calculate optimum specifications ...
Presentation
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Using CAD Tools for the Automatic Design of Low-Power ΣΔ Modulators

Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Pérez Verdú, Belén; Pérez Verdú, Belén; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (1997-01-01)
This paper illustrates the use of a CAD methodology to design a high-resolution 2nd-order ZA modulator with optimized power ...
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Using CAD tools for shortening the design cycle of high-performance sigma–delta modulators: A 16·4 bit, 9·6 kHz, 1·71 mW ΣΔM in CMOS 0·7 μm technology

Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Pérez Verdú, Belén; Pérez Verdú, Belén; Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Wiley-Blackwell, 1997-01-01)
This paper uses a CAD methodology proposed by the authors to design a low-power 2nd-order Sigma-Delta Modulator (ΣΔM). ...
Presentation
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A mismatch-insensitive high-accuracy high-speed continuous-time current comparator in low voltage CMOS

Río Fernández, Rocío del; Río Fernández, Rocío del; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1997-01-01)
This paper presents a CMOS current comparator which employs nonlinear feedback to obtain high-accuracy (down to 1.5 pA) ...
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Comparison of matroid intersection algorithms for large circuit analysis

Galán, Mariano; Galán, Mariano; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1997-01-01)
This paper presents two approaches to symbolic analysis of large analog integrated circuits via simplification during the ...
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Some design trade-offs for large CNN chips using small-size transistors

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Huertas Díaz, José Luis; Huertas Díaz, José Luis; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos (Institute of Electrical and Electronics Engineers, 1997-01-01)
Small-size MOS transistors (MOST) exhibit a bunch of second-order effects which limit their application to design Cellular ...
Presentation
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A one-transistor-synapse strategy for electrically-programmable massively-parallel analog array processors

Domínguez Castro, Rafael; Domínguez Castro, Rafael; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Carmona Galán, Ricardo; Carmona Galán, Ricardo (Institute of Electrical and Electronics Engineers, 1997-01-01)
This paper presents a linear, four-quadrants, electrically-programmable, one-transistor synapse strategy applicable to the ...
Presentation
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CMOS design of adaptive fuzzy ASICs using mixed-signal circuits

Vidal Verdú, Fernando; Vidal Verdú, Fernando; Navas González, Rafael; Navas González, Rafael; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1996-01-01)
Analog circuits are natural candidates to design fuzzy chips with optimum speed/power figures for precision up to about ...
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Hybrid-control of synapse circuits for programmable cellular neural networks

Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1996-01-01)
This paper describes a hybrid weight-control strategy for VLSI realizations of programmable Cellular Neural Networks (CNNs), ...
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A fourth-order bandpass ΣΔ modulator using current-mode analog/digital circuits

Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Pérez Verdú, Belén; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1996-01-01)
We present a fourth-order bandpass ΣΔ switched-current modulator IC in 0.8 μm CMOS single-poly technology. Its architecture ...
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Mixed-signal CNN array chips for image processing

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Roca Moreno, Elisenda; Roca Moreno, Elisenda (The International Society for Optical Engineering, 1996-01-01)
Due to their local connectivity and wide functional capabilities, cellular nonlinear networks (CNN) are excellent candidates ...
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A Family of matroid intersection algorithms for the computation of approximated symbolic network functions

Wambacq, Piet; Wambacq, Piet; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Gièlen, Georges G.E.; Gièlen, Georges G.E.; Sansen, Willy M.C.; Sansen, Willy M.C.; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1996-01-01)
In recent years, the technique of simplification during generation has turned out to be very promising for the efficient ...
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Learning under hardware restrictions in CMOS fuzzy controllers able to extract rules from examples

Vidal Verdú, Fernando; Vidal Verdú, Fernando; Navas González, Rafael; Navas González, Rafael; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Universidad de Granada. Departamento de Ciencias de la Computación e Inteligencia Artificial, 1996-01-01)
Fuzzy controllers are able to incorporate knowledge expressed in if-then rules. These rules are given by experts or skilful ...
Presentation
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Symbolic analysis tools-the state of the art

Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1996-01-01)
This paper reviews the main last generation symbolic analyzers, comparing them in terms of functionality, pointing out also their shortcomings. The state of the art in this field is also studied, pointing out directions for future research.
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IC design for spread spectrum communication exploiting chaos

Delgado Restituto, Manuel; Delgado Restituto, Manuel; Liñán Reyes, Matías; Liñán Reyes, Matías; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1996-01-01)
This paper presents a 2.4 /spl mu/m CMOS IC prototype which includes a programmable chaotic generator and some interface ...
Presentation
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Current-mode piecewise-linear function generators

Delgado Restituto, Manuel; Delgado Restituto, Manuel; Ceballos Cáceres, Joaquín Francisco; Ceballos Cáceres, Joaquín Francisco; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1996-01-01)
We present a systematic design technique for current-mode piecewise-linear (PWL) function generators. It uses two building ...
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A 16 Rules@2.5Mflips Mixed-Signal Programmable Fuzzy Controller CMOS-1μm Chip

Vidal Verdú, Fernando; Vidal Verdú, Fernando; Navas González, Rafael; Navas González, Rafael; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1996-01-01)
We present a fuzzy inference chip capable to evaluate 16 programmable rules at a speed of 2.5Mflips (2.5 × 10 6 fuzzy ...
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CMOS 2.4μm chaotic oscillator: Experimental verification of chaotic encryption of audio

Delgado Restituto, Manuel; Delgado Restituto, Manuel; Liñán Cembrano, Gustavo; Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institution of Engineering and Technology, 1996-01-01)
The Letter reports the first experimental verification of chaotic encryption of audio using custom monolithic chaotic ...
Presentation
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A CMOS fully-differential bandpass ΣΔ modulator using switched-current circuits

Rosa Utrera, José Manuel de la; Rosa Utrera, José Manuel de la; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Pérez Verdú, Belén; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1995-01-01)
This paper presents a fourth-order bandpass sigma-delta modulator that has been designed using fully-differential ...
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Using Building Blocks to Design Analog Neuro-Fuzzy Controllers

Vidal Verdú, Fernando; Vidal Verdú, Fernando; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1995-01-01)
We present a parallel architecture for fuzzy controllers and a methodology for their realization as analog CMOS chips for ...
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Modular Design of Adaptive Analog CMOS Fuzzy Controller Chips

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Vidal Verdú, Fernando; Vidal Verdú, Fernando (Institute of Electrical and Electronics Engineers, 1995-01-01)
Analog circuits are natural candidates to design fuzzy chips with optimum speed/power figures for precision up to about ...
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A modulator/demodulator CMOS IC for chaotic encryption of audio

Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Liñán Cembrano, M.; Liñán Cembrano, M. (Institute of Electrical and Electronics Engineers, 1995-01-01)
This paper reports the first experimental verification of chaotic encryption of audio signals using integrated circuits. ...
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Experimental verification of chaotic encryption of audio using monolithic chaotic modulators

Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Liñán Reyes, Matías; Liñán Reyes, Matías (SPIE- The International Society for Optical Engineering, 1995-01-01)
This paper reports the first experimental verification of chaotic encryption of audio signals using integrated circuits. ...
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Secure communication through switched-current chaotic circuits

Delgado Restituto, Manuel; Delgado Restituto, Manuel; López de Ahumada Gutiérrez, Rafael; López de Ahumada Gutiérrez, Rafael; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1995-01-01)
This paper presents the use of analog integrated circuits for secure communication based on chaos synchronization. The ...
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Efficient symbolic computation of approximated small-signal characteristics of analog integrated circuits

Wambacq, Piet; Wambacq, Piet; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Gielen, Georges; Gielen, Georges; Sansen, Willy M.C.; Sansen, Willy M.C.; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1995-01-01)
A symbolic analysis tool is presented that generates simplified symbolic expressions for the small-signal characteristics ...
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Tool for fast mismatch analysis of analog circuits

Rodríguez Macías, Rafael; Rodríguez Macías, Rafael; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1995-01-01)
A tool is presented that evaluates statistical deviations in performance characteristics of analog circuits, starting from ...
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Realization of a CNN universal chip in CMOS technology

Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1995-01-01)
This paper describes the design of a programmable Cellular Neural Network (CNN) chip, with additional functionalities ...
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Learning in neuro/fuzzy analog chips

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Vidal Verdú, Fernando; Vidal Verdú, Fernando (Institute of Electrical and Electronics Engineers, 1995-01-01)
This paper focus on the design of adaptive mixed-signal fuzzy chips. These chips have parallel architecture and feature ...
PhD Thesis
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Redes neuronales celulares: modelado y diseño monolítico

Domínguez Castro, Rafael; Domínguez Castro, Rafael; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos (1994-03-21)
Las aportaciones principales de esta Tesis se refieren al diseño de circuitos electrónicos con las primitivas disponibles ...
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Convergence and stability of the FSR CNN model

Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Carmona Galán, Ricardo; Carmona Galán, Ricardo (Institute of Electrical and Electronics Engineers, 1994-01-01)
Stability and convergency results are reported for a modified continuous-time CNN model. The signal range of the state ...
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Current-mode building blocks for CMOS-VLSI design of chaotic neural networks

Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1994-01-01)
This paper presents two nonlinear CMOS current-mode circuits that implement neuron soma equations for chaotic neural ...
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A basic building block approach to CMOS design of analog neuro/fuzzy systems

Vidal Verdú, Fernando; Vidal Verdú, Fernando; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Linares Barranco, Bernabé; Linares Barranco, Bernabé; Sánchez Sinencio, Edgar; Sánchez Sinencio, Edgar (Institute of Electrical and Electronics Engineers, 1994-01-01)
Outlines a systematic approach to design fuzzy inference systems using analog integrated circuits in standard CMOS VLSI ...
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SIRENA: A simulation environment for CNNs

Domínguez Castro, Rafael; Domínguez Castro, Rafael; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; García Vargas, Ignacio; García Vargas, Ignacio; Ramos, Juan F.; Ramos, Juan F.; Carmona Galán, Ricardo; Carmona Galán, Ricardo (Institute of Electrical and Electronics Engineers, 1994-01-01)
SIRENA is a general simulation environment for artificial neural networks, with emphasis towards CNNs. A special interest ...
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A countinuous-time cellular neural network chip for direction-selectable connected component detection with optical image acquisition

Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1994-01-01)
This paper presents a continuous-time Cellular Neural Network (CNN) chip [1] for the application of Connected Component ...
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Switched-Current Chaotic Neurons

Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institution of Engineering and Technology, 1994-01-01)
The Letter presents two nonlinear CMOS current-mode circuits that implement neuron soma equations for chaotic neural ...
Presentation
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Modeling OpAmp-induced harmonic distortion for switched-capacitor ΣΔ modulator design

Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Pérez Verdú, Belén; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1994-01-01)
This communication reports a new modeling of opamp-induced harmonic distortion in SC ΣΔ modulators, which is aimed to ...
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CMOS optical-sensor array with high output current levels and automatic signal-range centring

Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Carmona Galán, Ricardo; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institution of Engineering and Technology, 1994-01-01)
A CMOS compatible photosensor with high output current levels, and an area-efficient scheme for automatic signal-range ...
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CNN universal chip in CMOS technology

Domínguez Castro, Rafael; Domínguez Castro, Rafael; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1994-01-01)
This paper describes the design of a CNN universal chip in a standard CMOS technology. The core of the chip consists of ...
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Global design of analog cells using statistical optimization techniques

Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Rodríguez Macías, R.; Rodríguez Macías, R.; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Huertas Díaz, José Luis; Huertas Díaz, José Luis; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Springer, 1994-01-01)
We present a methodology for automated sizing of analog cells using statistical optimization in a simulation based approach. ...
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Weight-control strategy for programmable CNN chips

Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Carmona Galán, Ricardo; Carmona Galán, Ricardo (Institute of Electrical and Electronics Engineers, 1994-01-01)
This paper describes a hybrid weight-control strategy for the VLSI realization of programmable CNNs, based on automatic ...
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Symbolic analysis of large analog integrated circuits by approximation during expression generation

Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Wambacq, Piet; Wambacq, Piet; Gièlen, Georges G.E.; Gièlen, Georges G.E.; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Sansen, Willy M.C.; Sansen, Willy M.C. (Institute of Electrical and Electronics Engineers, 1994-01-01)
A novel algorithm is presented that generates approximate symbolic expressions for small-signal characteristics of large ...
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Smart-Pixel Cellular Neural Networks in Analog Current-Mode CMOS Technology

Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Huertas Díaz, José Luis; Huertas Díaz, José Luis; Sánchez Sinencio, Edgar; Sánchez Sinencio, Edgar (Institute of Electrical and Electronics Engineers, 1994-01-01)
This paper presents a systematic approach to design CMOS chips with concurrent picture acquisition and processing capabilities. ...
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CMOS current-mode chaotic neurons

Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1994-01-01)
This paper presents two nonlinear CMOS current-mode circuits that implement neuron soma equations for chaotic neural ...
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Algorithm for efficient symbolic analysis of large analogue circuits

Wambacq, Piet; Wambacq, Piet; Gièlen, Georges G.E.; Gièlen, Georges G.E.; Sansen, Willy M.C.; Sansen, Willy M.C.; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal (Institution of Engineering and Technology, 1994-01-01)
An algorithm is presented that generates simplified symbolic expressions for the small-signal characteristics of large ...
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Current-Mode Techniques for the Implementation of Continuous- and Discrete-Time Cellular Neural Networks

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1993-01-01)
This paper presents a unified, comprehensive approach to the design of continuous-time (CT) and discrete-time (DT) cellular ...
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A Tool for automated design of sigma-delta modulators using statistical optimization

Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Pérez Verdú, Belén; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1993-01-01)
A tool is presented which starting from high level specifications of SC σδ modulators (resolution, bandwidth and oversampling ...
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CMOS design of chaotic oscillators using state variables: a monolithic Chua's circuit

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Delgado Restituto, Manuel; Delgado Restituto, Manuel (Institute of Electrical and Electronics Engineers, 1993-01-01)
This paper presents design considerations for monolithic implementation of piecewise-linear (PWL) dynamic systems in CMOS ...
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Nonlinear switched-current CMOS IC for random signal generation

Delgado Restituto, Manuel; Delgado Restituto, Manuel; Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institution of Engineering and Technology, 1993-01-01)
A nonlinear switched-current circuit is presented that implements a chaotic algorithm for the generation of broadband, ...
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A Model for VLSI implementation of CNN image processing chips using current-mode techniques

Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Linares Barranco, Bernabé; Linares Barranco, Bernabé; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1993-01-01)
A new Cellular Neural Network model is proposed which allows simpler and faster VLSI implementation than previous models. ...
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A CMOS analog adaptive BAM with on-chip learning and weight refreshing

Linares Barranco, Bernabé; Linares Barranco, Bernabé; Sánchez Sinencio, Edgar; Sánchez Sinencio, Edgar; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1993-01-01)
In this paper we will extend the transconductance-mode (T-mode) approach [1] to implement analog continuous-time neural ...
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CMOS analog neural network systems based on oscillatory neurons

Linares Barranco, Bernabé; Linares Barranco, Bernabé; Sánchez Sinencio, Edgar; Sánchez Sinencio, Edgar; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1992-01-01)
This paper addresses the design of two neural network systems based on the use of pulsing neurons. Each neuron is built ...
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Analog Neural Programmable Optimizers in CMOS VLSI Technologies

Domínguez Castro, Rafael; Domínguez Castro, Rafael; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Huertas Díaz, José Luis; Sánchez Sinencio, Edgar; Sánchez Sinencio, Edgar (Institute of Electrical and Electronics Engineers, 1992-01-01)
A 3-μm CMOS IC is presented demonstrating the concept of an analog neural system for constrained optimization. A serial ...
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A prototype tool for optimum analog sizing using simulated annealing

Medeiro Hidalgo, Fernando; Medeiro Hidalgo, Fernando; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1992-01-01)
It is shown that using simulated annealing in combination with electrical simulation provides a powerful tool allowing ...
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A Chaotic Switched-Capacitor Circuit for 1/f Noise Generation

Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1992-01-01)
A switched-capacitor circuit is reported for the generation of 1 / fYnoise. The circuit is described by a chaotic first-order ...
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Architectures and building blocks for CMOS VLSI analog "neural" programmable optimizers

Domínguez Castro, Rafael; Domínguez Castro, Rafael; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Huertas Díaz, José Luis; Sánchez Sinencio, Edgar; Sánchez Sinencio, Edgar (Institute of Electrical and Electronics Engineers, 1992-01-01)
A modular reconfigurable serial architecture is presented for the analog/digital implementation of constrained optimization ...
PhD Thesis
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Optimizadores neuronales usando circuitos analógico-digitales

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Domínguez Castro, Rafael; Domínguez Castro, Rafael (1992-01-01)
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1/f/sup y/ noise generation through a chaotic nonlinear switched-capacitor circuit

Delgado Restituto, Manuel; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1992-01-01)
A programmable switched-capacitor circuit for the generation of 1/f/sup y/ noise is reported. The circuit is described by ...
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A piecewise-linear function approximation using current mode circuits

Ramírez Angulo, Jaime; Ramírez Angulo, Jaime; Sánchez Sinencio, Edgar; Sánchez Sinencio, Edgar; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1992-01-01)
A methodology to design currentmode circuits for piecewise-linear function approximation is presented. The technique is ...
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Modular analog continuous-time VLSI neural networks with on chip hebbian learning and analog storage

Linares Barranco, Bernabé; Linares Barranco, Bernabé; Sánchez Sinencio, Edgar; Sánchez Sinencio, Edgar; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1992-01-01)
A modular analog circuit design approach for hardware implementations of neural networks is presented. This approach is ...
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Switched-current techniques for image processing Cellular Neural Networks in MOS VLSI

Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1992-01-01)
An architecture and related building blocks are presented for the realization of image processing tasks using current-mode ...
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On simplification techniques for symbolic analysis of analog integrated circuits

Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Martín, J. D.; Martín, J. D.; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1992-01-01)
This paper addresses the topic of formula simplification for symbolic analyzers. Previously reported criteria for flat ...
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A modular T-mode design approach for analog neural network hardware implementations

Linares Barranco, Bernabé; Linares Barranco, Bernabé; Sánchez Sinencio, Edgar; Sánchez Sinencio, Edgar; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1992-01-01)
A modular transconductance-mode (T-mode) design approach is presented for analog hardware implementations of neural networks. ...
PhD Thesis
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Técnicas de análisis simbólico para el modelado y diseño de circuitos integrados analógicos

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal (1992-01-01)
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Hysteresis based neural oscillators for VLSI implementations

Linares Barranco, Bernabé; Linares Barranco, Bernabé; Sánchez Sinencio, Edgar; Sánchez Sinencio, Edgar; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1991-01-01)
The actual tendency in most of the work that is being done in VLSI neural network research is to use the simplest possible ...
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A switched-capacitor broadband noise generator for CMOS VLSI

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Delgado Restituto, Manuel; Delgado Restituto, Manuel; Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institution of Engineering and Technology, 1991-01-01)
A switched-capacitor circuit is reported for the generation of broadband white noise in MOS VLSI. It is based on the ...
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An advanced symbolic analyzer for the automatic generation of analog circuit design equations

Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1991-01-01)
A tool for symbolic analysis of analog integrated circuits is presented featuring accurate simplification, pole/zero ...
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Design of RC-active oscillators using composite amplifiers

Pérez Verdú, Belén; Pérez Verdú, Belén; Huertas Díaz, José Luis; Huertas Díaz, José Luis; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1991-01-01)
The design of composite opamp Wien-Bridge oscillators is systematically approached by using a general model including ...
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VLSI implementation of a transconductance mode continuous BAM with on chip learning and dynamic analog memory

Linares Barranco, Bernabé; Linares Barranco, Bernabé; Sánchez Sinencio, Edgar; Sánchez Sinencio, Edgar; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1991-01-01)
In this paper we present a complete VLSI Continuous-Time Bidirectional Associative Memory (BAM). The short term memory ...
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CMOS OTA-C high-frequency sinusoidal oscillators

Linares Barranco, Bernabé; Linares Barranco, Bernabé; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Sánchez Sinencio, Edgar; Sánchez Sinencio, Edgar; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1991-01-01)
Several topology families are given to implement practical CMOS sinusoidal oscillators by using operational transconductance ...
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Frequency tuning loop for VCOs

Linares Barranco, Bernabé; Linares Barranco, Bernabé; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Sánchez Sinencio, Edgar; Sánchez Sinencio, Edgar; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1991-01-01)
A frequency tuning circuit is introduced for VCOs (voltage-controlled oscillators) so that the final relationship between ...
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On the Design of Voltage-Controlled Sinusoidal Oscillators Using OTA's

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Linares Barranco, Bernabé; Linares Barranco, Bernabé; Huertas Díaz, José Luis; Huertas Díaz, José Luis; Sánchez Sinencio, Edgar; Sánchez Sinencio, Edgar (Institute of Electrical and Electronics Engineers, 1990-01-01)
A unified systematic approach to the design of voltage-controlled oscillators using only operational transconductance ...
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Analog neural networks for real-time constrained optimization

Domínguez Castro, Rafael; Domínguez Castro, Rafael; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Huertas Díaz, José Luis; Sánchez Sinencio, Edgar; Sánchez Sinencio, Edgar; Linares Barranco, Bernabé; Linares Barranco, Bernabé (Institute of Electrical and Electronics Engineers, 1990-01-01)
Architectures and circuit techniques for implementing general piecewise constrained optimization problems using VLSI ...
PhD Thesis
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Diseño en tecnología CMOS de osciladores controlados por tensión de alta frecuencia en modo de transconductancia

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Linares Barranco, Bernabé; Linares Barranco, Bernabé (1990-01-01)
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Accurate design of analog CNN in CMOS digital technologies

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1990-01-01)
Explores the design of cellular neural networks (CNN) by using sampled-data analog current-mode techniques which neither ...
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Design of an analog/digital truly random number generator

Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Martín, J. D.; Martín, J. D.; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1990-01-01)
An analog-digital system is presented for the generation of truly random (aperiodic) digital sequences. This model is based ...
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CMOS circuit implementations for neuron models

Linares Barranco, Bernabé; Linares Barranco, Bernabé; Sánchez Sinencio, Edgar; Sánchez Sinencio, Edgar; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1990-01-01)
The mathematical neuron basic cells used as basic cells in popular neural network architectures and algorithms are discussed. ...
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A CMOS Implementation of Fitzhugh-Nagumo Neuron Model

Linares Barranco, Bernabé; Linares Barranco, Bernabé; Sánchez Sinencio, Edgar; Sánchez Sinencio, Edgar; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1990-01-01)
A CMOS circuit is proposed that emulates FitzHugh-Nagumo's differential equations using OTAs, diode connected MOSFETs and ...
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Very high frequency CMOS OTA-C quadrature oscillators

Linares Barranco, Bernabé; Linares Barranco, Bernabé; Sánchez Sinencio, Edgar; Sánchez Sinencio, Edgar; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1990-01-01)
An approach to the design of high-frequency monolithic voltage-controlled oscillators using operational transconductance ...
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Operational transconductance amplifier-based nonlinear function syntheses

Sánchez Sinencio, Edgar; Sánchez Sinencio, Edgar; Ramírez Angulo, Jaime; Ramírez Angulo, Jaime; Linares Barranco, Bernabé; Linares Barranco, Bernabé; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1989-01-01)
It is shown that the operational transconductance amplifier, as the active element in basic building blocks, can be ...
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10mhz cmos ota-c voltage-controlled quadrature oscillator

Linares Barranco, Bernabé; Linares Barranco, Bernabé; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Sánchez Sinencio, Edgar; Sánchez Sinencio, Edgar; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institution of Engineering and Technology, 1989-01-01)
A quadrature-type voltage-controlled oscillator with operational transconductance amplifiers and capacitors (OTA-C) is ...
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Analog integrated neural-like circuits for nonlinear programming

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Domínguez Castro, Rafael; Domínguez Castro, Rafael; Huertas Díaz, José Luis; Huertas Díaz, José Luis; Sánchez Sinencio, Edgar; Sánchez Sinencio, Edgar (Institute of Electrical and Electronics Engineers, 1989-01-01)
A systematic approach for the design of analog neural nonlinear programming solvers using switched-capacitor (SC) integrated ...
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OTA-based non-linear function approximations

Sánchez Sinencio, Edgar; Sánchez Sinencio, Edgar; Ramírez Angulo, Jaime; Ramírez Angulo, Jaime; Linares Barranco, Bernabé; Linares Barranco, Bernabé; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1989-01-01)
The suitability of operational transconductance amplifiers (OTAs) as the main active element to obtain basic building ...
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Application of piecewise-linear switched-capacitor circuits for random number generation

Espejo Meana, Servando Carlos; Espejo Meana, Servando Carlos; Martín Gómez, José Domingo; Martín Gómez, José Domingo; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1989-01-01)
An unconventional application of switched-capacitor (SC) circuits is discussed. A systematic method for the design of ...
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A Programmable Neural Oscillator Cell

Linares Barranco, Bernabé; Linares Barranco, Bernabé; Sánchez Sinencio, Edgar; Sánchez Sinencio, Edgar; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1989-01-01)
A programmable analog neural oscillator cell architecture is presented. The proposed neuron circuit is of hysteretic neural ...
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Nonlinear time-domain macromodeling of OTA circuits

Pérez Verdú, Belén; Pérez Verdú, Belén; Cruz Moreno, J.; Cruz Moreno, J.; Linares Barranco, Bernabé; Linares Barranco, Bernabé; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Huertas Díaz, José Luis; Sánchez Sinencio, Edgar; Sánchez Sinencio, Edgar (Institute of Electrical and Electronics Engineers, 1989-01-01)
The authors present an accurate nonlinear macromodel of the operational transconductance amplifier (OTA) which is suitable ...
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A novel CMOS analog neural oscillator cell

Linares Barranco, Bernabé; Linares Barranco, Bernabé; Sánchez Sinencio, Edgar; Sánchez Sinencio, Edgar; Newcomb, Robert W.; Newcomb, Robert W.; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1989-01-01)
A very flexible programmable CMOS analog neural oscillator cell architecture is presented. The proposed neuron circuit ...
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Generation and design of sinusoidal oscillators using OTAS

Linares Barranco, Bernabé; Linares Barranco, Bernabé; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Huertas Díaz, José Luis; Sánchez Sinencio, Edgar; Sánchez Sinencio, Edgar; Hoyle, Javier J.; Hoyle, Javier J. (Institute of Electrical and Electronics Engineers, 1988-01-01)
The design of voltage-controlled oscillators (VCOs) using operational transconductance amplifiers (OTAs) is discussed. ...
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A new nonlinear time-domain op-amp macromodel using threshold functions and digitally controlled network elements

Pérez Verdú, Belén; Pérez Verdú, Belén; Huertas Díaz, José Luis; Huertas Díaz, José Luis; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1988-01-01)
A general-purpose nonlinear macromodel for the time-domain simulation of integrated circuit operational amplifiers (op ...
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Switched-capacitor neural networks for linear programming

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Rueda Rueda, Adoración; Rueda Rueda, Adoración; Huertas Díaz, José Luis; Huertas Díaz, José Luis; Domínguez Castro, Rafael; Domínguez Castro, Rafael (Institution of Engineering and Technology, 1988-01-01)
A circuit for online solving of linear programming problems is presented. The circuit uses switched-capacitor techniques ...
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Chaos via a piecewise-linear switch ed-capacitor circuit

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Rueda Rueda, Adoración; Rueda Rueda, Adoración; Pérez Verdú, Belén; Pérez Verdú, Belén; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institution of Engineering and Technology, 1987-01-01)
A nonlinear switched-capacitor circuit that generates chaotic signals is reported. The circuit is described by a first-order ...
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Chaos From Switched-Capacitor Circuits: Discrete Maps

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Huertas Díaz, José Luis; Rueda Rueda, Adoración; Rueda Rueda, Adoración; Pérez Verdú, Belén; Pérez Verdú, Belén (Institute of Electrical and Electronics Engineers, 1987-01-01)
A special-purpose analog computer made of switched-capacitor circuits is presented for analyzing chaos and bifurcation ...
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High-Frequency Design of the Wien-Bridge Oscillator Using Composite Amplifiers

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Huertas Díaz, José Luis; Pérez Verdú, Belén; Pérez Verdú, Belén (Institute of Electrical and Electronics Engineers, 1987-01-01)
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Nonlinear Switched-Capacitor Networks: Basic Principles and Piecewise-Linear Design

Huertas Díaz, José Luis; Huertas Díaz, José Luis; Chua, Leon O.; Chua, Leon O.; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Rueda Rueda, Adoración; Rueda Rueda, Adoración (Institute of Electrical and Electronics Engineers, 1985-01-01)
The applicability of switched-capacitor (SC) components to the design of nonlinear networks is extensively discussed in ...
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Chaos in a Switched-Capacitor Circuit

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Huertas Díaz, José Luis; Chua, Leon O.; Chua, Leon O. (Institute of Electrical and Electronics Engineers, 1985-01-01)
We report chaotic phenomena observed from a simple nonlinear switched-capacitor circuit. The experimentally measured ...
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New analogue switch circuit having very low forward resistance

Huertas Díaz, José Luis; Huertas Díaz, José Luis; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Rueda Rueda, Adoración; Rueda Rueda, Adoración (Institution of Engineering and Technology, 1984-01-01)
A new circuit realisation for an analogue switch is reported. The main feature of the proposed design is the low value of ...
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Circuits and Systems Letters: A Novel SC Oscillator

Huertas Díaz, José Luis; Huertas Díaz, José Luis; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Pérez Verdú, Belén; Pérez Verdú, Belén (Institute of Electrical and Electronics Engineers, 1984-01-01)
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On the Active Compensation of Operational Amplifier Based VCVS

Huertas Díaz, José Luis; Huertas Díaz, José Luis; Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1982-01-01)
A unified treatment of the active compensation for VCVS realized by operational amplifiers is presented. It is a summary ...
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Novel active-compensated weighted summer

Rodríguez Vázquez, Ángel Benito; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Huertas Díaz, José Luis (Institution of Engineering and Technology, 1980-01-01)
A summer amplifier with extended bandwidth is proposed. Compensation of the frequency characteristics is achieved by employing two operational amplifiers instead of external reactive components.