Presentation
CMOS current-mode chaotic neurons
Author/s | Delgado Restituto, Manuel
Rodríguez Vázquez, Ángel Benito ![]() ![]() ![]() ![]() ![]() ![]() ![]() |
Department | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo |
Date | 1994 |
Published in |
|
ISBN/ISSN | 0-7803-1915-X |
Abstract | This paper presents two nonlinear CMOS current-mode circuits that implement neuron soma equations for chaotic neural networks, and another circuit to realize programmable current-mode synapse using CMOS-compatible BJT's. ... This paper presents two nonlinear CMOS current-mode circuits that implement neuron soma equations for chaotic neural networks, and another circuit to realize programmable current-mode synapse using CMOS-compatible BJT's. They have been fabricated in a double-metal, single-poly 1.6 /spl mu/m CMOS technology and their measured performance reached the expected function and specifications. The neuron soma circuits use a novel, highly accurate CMOS circuit strategy to realize piecewise-linear characteristics in the current-mode domain. Their prototypes obtain reduced area and low voltage power supply (down to 3 V) with clock frequency of 500 kHz. As regard to the synapse circuit, it obtains large linearity and continuous, linear, weight adjustment by exploration of the exponential-law operation of CMOS-BJT's. The full accordance observed between theory and measurements supports the development of future analog VLSI chaotic neural networks to emulate biological systems and advanced computation. |
Citation | Delgado Restituto, M. y Rodríguez Vázquez, Á.B. (1994). CMOS current-mode chaotic neurons. En IEEE International Symposium on Circuits and Systems (ISCAS) (499-502), Londres, Reino Unido: Institute of Electrical and Electronics Engineers. |
Files | Size | Format | View | Description |
---|---|---|---|---|
CMOS Current-Mode.pdf | 343.9Kb | ![]() | View/ | |