Browsing Ponencias (Instituto de Microelectrónica de Sevilla (IMSE-CNM)) by Title
Now showing items 1-20 of 304
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Presentation
1.2V, 1.96mW @ 2.4GHz CMOS-90nm switched-transconductor mixer
(2010)This paper presents the design of a fully differential double balanced switched transconductor mixer for ZigBee applications ...
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Presentation
1/f/sup y/ noise generation through a chaotic nonlinear switched-capacitor circuit
(Institute of Electrical and Electronics Engineers, 1992)A programmable switched-capacitor circuit for the generation of 1/f/sup y/ noise is reported. The circuit is described by ...
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Presentation
1D Cellular Automata for Pulse Width Modulated Compressive Sampling CMOS Image Sensors
(Institute of Electrical and Electronics Engineers, 2018)Compressive sensing (CS) is an alternative to the Shannon limit when the signal to be acquired is known to be sparse or ...
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Presentation
3-Layer CNN Chip for Focal-Plane Complex Dynamics with Adaptive Image Capture
(Institute of Electrical and Electronics Engineers, 2006)This paper presents a CMOS implementation of a layered CNN concurrent with 32times32 photosensors with locally programmable ...
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Presentation
3D multi-layer vision architecture for surveillance and reconnaissance applications
(Institute of Electrical and Electronics Engineers, 2009)The architecture and the design details of a multilayer combined mixed-signal and digital sensor-processor array chip is ...
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Presentation
5×5 SPAD matrices for the study of the trade-offs between fill factor, dark count rate and crosstalk in the design of CMOS image sensors
(Institute of Electrical and Electronics Engineers, 2014)CMOS Single Photon Avalanche Diodes (SPADs) are a dedicated type of photodetectors that are attracting increasing interest. ...
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Presentation
A 0.13μm CMOS current steering D/A converter for PLC and VDSL applications
(2005)This paper describes the design of a 12-bit 80MS/s Digital-to-Analog converter implemented in a 0.13μm CMOS logic ...
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Presentation
A 0.18 μm CMOS low noise, highly linear continuous-time seventh-order elliptic low-pass filter
(The International Society for Optical Engineering- SPIE, 2005)This paper presents a fast procedure for the system-level evaluation of noise and distortion in continuous-time integrated ...
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Presentation
A 0.18μm CMOS low-noise elliptic low-pass continuous-time filter
(Institute of Electrical and Electronics Engineers, 2005)This paper presents a seventh order low-pass continuous-time elliptic filter for use in a high-performance wireline ...
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Presentation
A 0.35 μm CMOS 17-bit@40-kS/s cascade 2-1 ΣΔ modulator with programmable gain and programmable chopper stabilization
(The International Society for Optical Engineering - SPIE, 2005)This paper describes a 0.35μm CMOS chopper-stabilized Switched-Capacitor 2-1 cascade ΣDelta; modulator for automotive ...
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Presentation
A 0.35μm CMOS 17-bit@40kS/s Sensor A/D Interface Based on a Programmable-Gain Cascade 2-1 ΣΔ Modulator
(Institute of Electrical and Electronics Engineers, 2004)This paper describes the design and electrical implementation of an A/D interface for sensor applications realized in a ...
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Presentation
A 0.5 /spl mu/m CMOS CNN analog random access memory chip for massive image processing
(Institute of Electrical and Electronics Engineers, 1998)An analog RAM has been designed to act as a cache memory for a CNN Universal Machine. Hence, all the non-standard chips ...
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Presentation
A 12-bit@40MS/s Gm-C Cascade 3-2 Continuous-Time Sigma-Delta Modulator
(Institute of Electrical and Electronics Engineers, 2007)This paper reports the transistor-level design of a 130-nm CMOS continuous-time cascade ΣΔ modulator. The modulator topology, ...
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Presentation
A 14-bit 4-MS/s Multi-bit Cascade Sigma-Delta Modulator in CMOS 0.35-um Digital Technology
(2000)This paper presents a 4th-order 3-stage cascade SD modulator that achieves 14-bit dynamic range at 4MS/s using low ...
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Presentation
A 16 Rules@2.5Mflips Mixed-Signal Programmable Fuzzy Controller CMOS-1μm Chip
(Institute of Electrical and Electronics Engineers, 1996)We present a fuzzy inference chip capable to evaluate 16 programmable rules at a speed of 2.5Mflips (2.5 × 10 6 fuzzy ...
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Presentation
A 2.2 μW analog front-end for multichannel neural recording
(Institute of Electrical and Electronics Engineers, 2017)In this paper an analog front-end for the multi-channel implantable recording of neural signals is presented. It is comprised ...
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Presentation
A 2.5-V CMOS Wideband Sigma-Delta Modulator
(Institute of Electrical and Electronics Engineers, 2003)A high-performance Sigma-Delta modulator for wireline communication applications is presenfed It employs a 4th-order cascade ...
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A 2.5-V ΣΔ modulator in 0.25-um CMOS for ADSL
(Institute of Electrical and Electronics Engineers, 2002)This paper presents a dual-quantization SC Sigma-Delta Modulator intended for A/D Conversion in ADSL applications.
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Presentation
A 2.5MHz bandpass active complex filter With 2.4MHz bandwidth for wireless communications
(2008)This paper presents a fully differential 8thorder transconductor-based active complex filter with 2.4MHz bandwidth and ...
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Presentation
A 26.5 nJ/px 2.64 Mpx/s CMOS Vision Sensor for Gaussian Pyramid Extraction
(Institute of Electrical and Electronics Engineers, 2014)This paper introduces a CMOS vision sensor to extract the Gaussian pyramid with an energy cost of 26.5 nJ/px at 2.64 Mpx/s, ...