Ponencia
VersaTile Convolutional Neural Network Mapping on FPGAs
Autor/es | Muñío Gracia, A.
Fernández Berni, Jorge Carmona Galán, R. Rodríguez Vázquez, Ángel Benito |
Departamento | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo |
Fecha de publicación | 2020 |
Fecha de depósito | 2023-05-31 |
Publicado en |
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ISBN/ISSN | 978-172813320-1 02714310 |
Resumen | Convolutional Neural Networks (ConvNets) are directed acyclic graphs with node transitions determined by a 1 set of configuration parameters. In this paper, we describe a 2 dynamically configurable hardware architecture ... Convolutional Neural Networks (ConvNets) are directed acyclic graphs with node transitions determined by a 1 set of configuration parameters. In this paper, we describe a 2 dynamically configurable hardware architecture that enables 4 3 data allocation strategy adjustment according to ConvNets layer 5 characteristics. The proposed flexible scheduling solution allows 6 the accelerator design to be portable across various scenarios of 7 computation and memory resources availability. For instance, 8 FPGA block-RAM resources can be properly balanced for 9 optimization of data distribution and minimization of off-chip 10 memory accesses. We explore the selection of tailored scheduling policies that translate into efficient on-chip data reuse and hence lower energy consumption. The system can autonomously adapt its behavior with no need of platform reconfiguration nor user supervision. Experimental results are presented and compared with state-of-the-art accelerators. |
Agencias financiadoras | European Union (UE). H2020 Ministerio de Economia, Industria y Competitividad (MINECO). España Office of Naval Research (ONR). United States |
Identificador del proyecto | 765866
RTI2018-097088-B-C31 N00014-19-1-2156 |
Cita | Muñío Gracia, A., Fernández Berni, J., Carmona Galán, R. y Rodríguez Vázquez, Á.B. (2020). VersaTile Convolutional Neural Network Mapping on FPGAs. En International Symposium on Circuits and Systems (9181037-), Institute of Electrical and Electronics Engineers (IEEE). |
Ficheros | Tamaño | Formato | Ver | Descripción |
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VersaTile Convolutional.pdf | 549.1Kb | [PDF] | Ver/ | |