Ponencia
On the calibration of a SPAD-based 3D imager with in-pixel TDC using a time-gated technique
Autor/es | Vornicu, Ion
Carmona Galán, Ricardo Rodríguez Vázquez, Ángel Benito |
Departamento | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo |
Fecha de publicación | 2015 |
Fecha de depósito | 2019-10-11 |
Publicado en |
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ISBN/ISSN | 978-1-4799-8391-9 |
Resumen | The optical characterization of a CMOS 64×64 single-photon avalanche-diode (SPAD) array with in-pixel 11b time-to-digital converter (TDC) is presented. The overall full-width half-maximum (FWHM) of the detector ensemble ... The optical characterization of a CMOS 64×64 single-photon avalanche-diode (SPAD) array with in-pixel 11b time-to-digital converter (TDC) is presented. The overall full-width half-maximum (FWHM) of the detector ensemble SPAD plus TDC is 690ps. The sensor has been fabricated in a 0.18μm standard CMOS technology which features an average dark-count rate (DCR) of 42kHz at 1V excess voltage (V e ) and room temperature. The detector successfully uses its time-gating capability to mitigate this large amount of noise enabling the sensor for accurate time-of-flight (ToF) measurements. The effectiveness of the time-gating technique is experimentally demonstrated. According to measurements, a time window of 400ns is enough to ensure that the TDC is triggered by light rather than by spurious events. |
Identificador del proyecto | N000141410355
TEC2012-38921- C02 IPT- 2011-1625-430000 IPC- 20111009 TIC 2012- 2338 |
Cita | Vornicu, I., Carmona Galán, R. y Rodríguez Vázquez, Á.B. (2015). On the calibration of a SPAD-based 3D imager with in-pixel TDC using a time-gated technique. En 2015 IEEE International Symposium on Circuits and Systems (ISCAS) (1102-1105), Lisboa, Portugal: Institute of Electrical and Electronics Engineers. |
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