Author profile: Guerrero Martos, David
Institutional data
| Name | Guerrero Martos, David |
| Department | Tecnología Electrónica |
| Knowledge area | Tecnología Electrónica |
| Professional category | Profesor Contratado Doctor |
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Statistics
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No. publications
48
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No. visits
3722
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No. downloads
5976
| Publications |
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Article
 An Integrated Digital System Design Framework With On-Chip Functional Verification and Performance Evaluation
(IEEE Computer Society, 2021-01-01)
This paper introduces a design and on-chip verification framework for IPCores in FPGA platforms. The methodology of the ... |
Article
Embedded LUKS (E-LUKS): A Hardware Solution to IoT Security
(MDPI, 2021-01-01)
The Internet of Things (IoT) security is one of the most important issues developers have to face. Data tampering must be ... |
Article
Address-encoded byte order
(Elsevier, 2020-01-01)
Unaligned accesses are forbidden in many high-performance architectures. In most of these architectures, the least significant ... |
Article
Using the complement of the cosine to compute trigonometric functions
(Springer, 2020-01-01)
The computation of the sine and cosine functions is required in devices ranging from application-specific signal processors ... |
Article
High-Performance Time Server Core for FPGA System-on-Chip
(MDPI, 2019-01-01)
This paper presents the complete design and implementation of a low-cost, low-footprint, network time protocol server core ... |
Article
Minimalistic SDHC-SPI hardware reader module for boot loader applications
(Elsevier, 2017-01-01)
This paper introduces a low-footprint full hardware boot loading solution for FPGA-based Programmable Systems on Chip. The ... |
Presentation
Building a basic membrane computer
(Fénix, 2016-01-01)
In this work, we present the building of two well-known membrane com- puters (squares generator and divisor test). Although ... |
Presentation
evercodeML: a formal language for SoC integration
(IEEE Computer Society, 2015-01-01)
Complex SoC design devote a great part of the developing time to module integration tasks. The necessity of automating ... |
Article
NanoFS: a hardware-oriented file system
(IEEE Computer Society, 2013-01-01)
NanoFS is a novel file system for embedded systems and storage-class memories (like flash) and is specially designed to be ... |
Presentation
Experiencia de renovación metodológica en la enseñanza de la electrónica digital básica
(Universidad de Vigo, 2012-01-01)
Esta contribución presenta una experiencia sobre el proceso de adaptación de una asignatura de electrónica digital básica ... |
Presentation
Implementación de un procesador académico simple así como de un entorno de programación y depuración para el mismo
(Universidad Politécnica de Madrid, 2012-01-01)
En este trabajo se desarrolla un procesador académico para su uso en la asignatura Estructura de Computadores de primer ... |
Presentation
Methodology Updating Experience in Basic Digital Electronics Teaching
(IEEE Computer Society, 2012-01-01)
This contribution describes the experience of updating a basic digital electronics course in a Computer Science grade as a ... |
Chapter of Book
Open Development Platform for Embedded Systems
(IntechOpen, 2012-01-01)
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| PhD Thesis |
Presentation
Implementation of a hardware and software framework for a simple academic processor
(IEEE Computer Society, 2012-01-01)
An academic processor to be used in the “Computer Structure” subject has been developed in this work. During the lab ... |
Presentation
Implementation of a configuration server for a hardware SNTP synchronization platform based on FPGA
(IEEE Computer Society, 2011-01-01)
This paper presents the implementation of a configuration server for a SNTP synchronization platform which implements accurate ... |
Presentation
Python as a hardware description language: A case study
(IEEE Computer Society, 2011-01-01)
Many people may see the development of software and hardware like different disciplines. However, there are great similarities ... |
Presentation
Delay and power consumption of static bulk-CMOS gates using independent bodies
(IEEE Computer Society, 2009-01-01)
Digital designs implemented using SOI processes employ separated bodies for each transistor. This approach is not usually ... |
Presentation
La primera experiencia en el diseño de sistemas digitales sobre FPGAs
(Universidad de Zaragoza, 2008-01-01)
Se presenta una práctica de introducción al diseño de sistemas digitales sobre FPGAs. El objetivo es que se pueda realizar ... |
Presentation
La primera experiencia en el diseño de sistemas digitales sobre FPGAs
(Universidad Politécnica de Madrid, 2008-01-01)
Se presenta una práctica de introducción al diseño de sistemas digitales sobre FPGAs. El objetivo es que se pueda realizar ... |
Chapter of Book
Power Dissipation Associated to Internal Effect Transitions in Static CMOS Gates
(Springer, 2008-01-01)
Power modeling techniques have traditionally neglected the main part of the energy consumed in the internal nodes of static ... |
Presentation
Desarrollo de una interfaz RS-232 para el manejo de un coche de radiocontrol desde el PC
(Universidad de Zaragoza, 2008-01-01)
Este trabajo presenta el desarrollo de un sistema de radiocontrol para un coche teledirigido. Se trata de un circuito que, ... |
Presentation
Building a SoC for industrial applications based on LEON microprocessor and a GNU/Linux distribution
(IEEE Computer Society, 2008-01-01)
This paper presents the design of a complete RTU (Remote Terminal Unit) with a System-on-Chip solution based completely ... |
Presentation
Design and Implementation of a SNTP Client on FPGA
(IEEE Computer Society, 2008-01-01)
This contribution presents the design and implementation of a SNTP client module suitable for IEC 61850 environments fully ... |
Presentation
Design of a FFT/IFFT module as an IP core suitable for embedded systems
(IEEE Computer Society, 2007-01-01)
In this work, we have laid the foundations that allow us to accomplish the implementation of a FFT/IFFT module as an IP ... |
Chapter of Book
Static Power Consumption in CMOS Gates Using Independent Bodies
(Springer, 2007-01-01)
It has been reported that the use of independent body terminals for series transistors in static bulk-CMOS gates improves ... |
Presentation
Automatic logic synthesis for parallel alternating latches clocking schemes
(SPIE Digital Library, 2007-01-01)
This paper proposes a VHDL coding technique that allows for the automatic synthesis of digital circuits using the so called ... |
Presentation
A SoC Design Methodology for LEON2 on FPGA
(IBERCHIP, 2006-01-01)
SoC design methodologies show up as a natural and productive method to implement embedded and/or ubiquitous systems. The ... |
Presentation
Diseño e Implementación Óptima de Periféricos de DSP con System Generator para Microblaze
(IBERCHIP, 2006-01-01)
Con este trabajo pretendemos analizar como se lleva a cabo el diseño de periféricos de DSP utilizando uno de los nuevos ... |
Presentation
Diseño e implantación de SoPC basados en el microprocesador PicoBlaze
(Universidad Politécnica de Madrid, 2006-01-01)
Con este trabajo pretendemos realizar una aportación a la docencia de la materias que cu bren el diseño de SoPC (System ... |
Presentation
Efficient Design and Implementation on FPGA of a MicroBlaze Peripheral for Processing Direct Electrical Networks Measurements
(IEEE Computer Society, 2006-01-01)
This contribution successfully accomplished the design and implementation of an advanced DSP circuit for direct measurements ... |
Presentation
Diseño e implementación de SOPC basados en el microprocesador Picoblaze
(Universidad Politécnica de Madrid, 2006-01-01)
Con este trabajo pretendemos realizar una aportación a la docencia de la materias que cubren el diseño de SoPC (System on ... |
Presentation
Desarrollo en VHDL de un filtro digital genérico basado en estructuras canónicas.
(Universidad Politécnica de Madrid, 2006-01-01)
Este trabajo abarca la realización de un filtro digital a bajo nivel. El diseño propuesto se basa en la utilización de un ... |
Article
Automated performance evaluation of skew-tolerant clocking schemes
(Taylor and Francis Online, 2006-01-01)
In this paper the authors evaluate the timing and power performance of three skew-tolerant clocking schemes. These schemes ... |
Presentation
Formación de profesores noveles en tecnología electrónica: una primera aproximación
(Universidad de Sevilla, Instituto de Ciencias de la Educación, 2005-01-01)
Los profesores universitarios de áreas científicas y técnicas están cada vez más preocupados por desarrollar adecuadamente ... |
Presentation
Efficient Design of a FFT/IFFT-64 Module on ASIC
(IBERCHIP, 2005-01-01)
In this work we present the VHDL implementation of a FFT/IFFT-64 module. This implementation: (a) is relatively quick and ... |
Article
Application of Internode model to global power consumption estimation in SCMOS gates
(Springer, 2005-01-01)
In this paper, we present a model, Internode, that unifies the gate functional behavior and the dynamic one. It is based ... |
Presentation
Algorithms to get the maximum operation frequency for skew-tolerant clocking schemes
(Society of Photo-Optical Instrumentation Engineers (SPIE), 2005-01-01)
Nowadays it is not possible to neglect the delay of interconnection lines. The die size is rising very fast, and the delay ... |
Chapter of Book
Logic-Level Fast Current Simulation for Digital CMOS Circuits
(Springer, 2005-01-01)
Nowadays, verification of digital integrated circuit has been focused more and more from the timing and area field to ... |
Presentation
Análisis del comportamiento de la videoconsola Atari 2600 como sistema digital real basado en microprocesador en el laboratorio de electrónica.
(Universidad Politécnica de Valencia, 2004-01-01)
En este trabajo se propone una práctica de laboratorio para la asignatura Estructura de Computadores de primer curso de ... |
Presentation
ADKI: un sistema web de adquisición de datos bajo Linux
(Universidad Politécnica de Valencia, 2004-01-01)
Esta contribución presenta una aplicación genérica de adquisición de datos y control para sistemas simples que incorpora ... |
Article
Signal Sampling Based Transition Modeling for Digital Gates Characterization
(Springer, 2004-01-01)
Current characterization methods introduce an important error in the measurement process. In this paper, we present a novel ... |
Presentation
Seguridad en Internet: web spoofing
(Universidad Politécnica de Valencia, 2004-01-01)
En este trabajo se estudia la técnica Web Spoofing como método de ataque a través de Internet. Se trata de una variante ... |
Presentation
Diseño del microcontrolador 8051 con módulo ensamblador- generador de ROM en lenguaje VHDL
(Universidad Politécnica de Valencia, 2004-01-01)
En este trabajo se presenta el resultado de un Proyecto Fin de Carrera en el que se ha diseñado el microcontrlador 8051 ... |
Presentation
Internode: Internal Node Logic Computational Model
(IEEE Computer Society, 2003-01-01)
In this work, we present a computational behavioral model for logic gates called Internode (Internal Node Logic Computational ... |
Chapter of Book
Computational Delay Models to Estimate the Delay of Floating Cubes in CMOS Circuits
(Springer, 2003-01-01)
The verification of the timing requirements of large VLSI circuits is generally performed by using simulation or timing ... |
Article
Characterization of Normal Propagation Delay for Delay Degradation Model (DDM)
(Springer, 2002-08-27)
In previous papers we have presented a very accurate model that handles the generation and propagation of glitches, which ... |
Chapter of Book
Efficient and Fast Current Curve Estimation of CMOS Digital Circuits at the Logic Level
(Springer, 2002-01-01)
This contribution presents a method to obtain current estimations at the logic level. This method uses a simple current ... |