Chapter of Book
Static Power Consumption in CMOS Gates Using Independent Bodies
Author/s | Guerrero Martos, David
![]() ![]() ![]() ![]() ![]() ![]() ![]() Millán Calderón, Alejandro ![]() ![]() ![]() ![]() ![]() ![]() ![]() Juan Chico, Jorge ![]() ![]() ![]() ![]() ![]() ![]() ![]() Bellido Díaz, Manuel Jesús ![]() ![]() ![]() ![]() ![]() ![]() Ruiz de Clavijo Vázquez, Paulino ![]() ![]() ![]() ![]() ![]() ![]() Ostúa Arangüena, Enrique ![]() ![]() ![]() ![]() ![]() ![]() ![]() Viejo Cortés, Julián ![]() ![]() ![]() ![]() ![]() ![]() ![]() |
Department | Universidad de Sevilla. Departamento de Tecnología Electrónica |
Date | 2007 |
Published in |
|
ISBN/ISSN | 978-3-540-74441-2 0302-9743 |
Abstract | It has been reported that the use of independent body terminals for
series transistors in static bulk-CMOS gates improves their timing and dynamic
power characteristics. In this paper, the static power consumption of ... It has been reported that the use of independent body terminals for series transistors in static bulk-CMOS gates improves their timing and dynamic power characteristics. In this paper, the static power consumption of gates using this approach is addressed. When compared to conventional common body static CMOS, important static power enhancements are obtained. Accurate electrical simulation results reveals improvements up to 35% and 62% in NAND and NOR gates respectively. |
Project ID. | TEC-2004-00840-MIC
![]() EXC-TIC-1023 ![]() EXC-TIC-635 ![]() |
Citation | Guerrero Martos, D., Millán Calderón, A.,...,Viejo Cortés, J. (2007). Static Power Consumption in CMOS Gates Using Independent Bodies. En Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2007. Lecture Notes in Computer Science, vol 4644 (pp. 404-412). Berlin: Springer. |
Files | Size | Format | View | Description |
---|---|---|---|---|
Static power.pdf | 414.3Kb | ![]() | View/ | |