Author profile: Viejo Cortés, Julián
Institutional data
| Name | Viejo Cortés, Julián |
| Department | Tecnología Electrónica |
| Knowledge area | Tecnología Electrónica |
| Professional category | Profesor Contratado Doctor |
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Statistics
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No. publications
50
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No. visits
4123
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No. downloads
10136
| Publications |
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Article
 IRIS: An embedded secure boot for IoT devices
(Elsevier, 2023-10-01)
This study proposes a hardware secure boot solution, an instant retrieval information system (IRIS) that is suitable for ... |
Article
An Integrated Digital System Design Framework With On-Chip Functional Verification and Performance Evaluation
(IEEE Computer Society, 2021-01-01)
This paper introduces a design and on-chip verification framework for IPCores in FPGA platforms. The methodology of the ... |
Article
Embedded LUKS (E-LUKS): A Hardware Solution to IoT Security
(MDPI, 2021-01-01)
The Internet of Things (IoT) security is one of the most important issues developers have to face. Data tampering must be ... |
Article
Address-encoded byte order
(Elsevier, 2020-01-01)
Unaligned accesses are forbidden in many high-performance architectures. In most of these architectures, the least significant ... |
Article
Using the complement of the cosine to compute trigonometric functions
(Springer, 2020-01-01)
The computation of the sine and cosine functions is required in devices ranging from application-specific signal processors ... |
Article
High-Performance Time Server Core for FPGA System-on-Chip
(MDPI, 2019-01-01)
This paper presents the complete design and implementation of a low-cost, low-footprint, network time protocol server core ... |
Article
Minimalistic SDHC-SPI hardware reader module for boot loader applications
(Elsevier, 2017-01-01)
This paper introduces a low-footprint full hardware boot loading solution for FPGA-based Programmable Systems on Chip. The ... |
PhD Thesis
Implementación sobre hardware reconfigurable de una arquitectura no determinista, paralela y distribuida de alto rendimiento, basada en modelos de computación con membranas
(2016-01-26)
En este documento se presenta el trabajo de tesis doctoral realizado dentro del Programa de Doctorado “Informática Industrial” ... |
Presentation
Procesamiento de bioseñales: un enfoque práctico
(Universidad de Sevilla, 2016-01-01)
La disciplina de procesamiento de bioseñales aparca un amplio y complejo espectro de conocimientos. El diseño de sesiones ... |
Presentation
Metodología PBL en modo colaborativo aplicada al diseño de un SoC
(Universidad de Sevilla, 2016-01-01)
Dado el carácter principalmente práctico en las asignaturas de los másteres universitarios la metodología PBL es ampliamente ... |
Presentation
Creación de carteles autoexplicativos para laboratorios de electrónica
(Universidad de Sevilla, 2016-01-01)
Se presenta un proyecto cuyo objetivo ha sido ha sido la creación de carteles que, a modo de tutoriales resumidos, muestran ... |
Presentation
Metodología de evaluación continua para grupos numerosos en Procesamiento de Señales Multimedia
(Universidad de Sevilla, 2016-01-01)
La asignatura de Procesamiento de Señales Multimedia utiliza una metodología de evaluación continua consistente en la ... |
Presentation
Building a basic membrane computer
(Fénix, 2016-01-01)
In this work, we present the building of two well-known membrane com- puters (squares generator and divisor test). Although ... |
Presentation
Aplicaciones docentes del diseño de un pico-procesador
(Universidad de Sevilla, 2016-01-01)
El conocimiento de la estructura interna y del mecanismo de funcionamiento de microprocesadores es una parte muy importante ... |
Article
Fast Hardware Implementations of Static P Systems
(2016-01-01)
In this article we present a simulator of non-deterministic static P systems using Field Programmable Gate Array (FPGA) ... |
Presentation
evercodeML: a formal language for SoC integration
(IEEE Computer Society, 2015-01-01)
Complex SoC design devote a great part of the developing time to module integration tasks. The necessity of automating ... |
Presentation
Application of virtualization technology to the study of quality of service techniques
(IEEE Computer Society, 2014-01-01)
In this article, the teaching of quality of service mechanisms in packet-switched networks is presented. To this end, a ... |
Presentation
Aplicación de la Virtualización al estudio de técnicas de Calidad de Servicio - QoS
(Universidad de Deusto, 2014-01-01)
Este trabajo abarca la aplicación de técnicas de calidad de servicio en redes de conmutación de paquetes. Para ello se ... |
Article
NanoFS: a hardware-oriented file system
(IEEE Computer Society, 2013-01-01)
NanoFS is a novel file system for embedded systems and storage-class memories (like flash) and is specially designed to be ... |
Presentation
Implementación de un procesador académico simple así como de un entorno de programación y depuración para el mismo
(Universidad Politécnica de Madrid, 2012-01-01)
En este trabajo se desarrolla un procesador académico para su uso en la asignatura Estructura de Computadores de primer ... |
Chapter of Book
Network Time Synchronization: A Full Hardware Approach
(Springer, 2012-01-01)
Complex digital systems are typically built on top of several abstraction levels: digital, RTL, computer, operating system ... |
Presentation
Implementation of a hardware and software framework for a simple academic processor
(IEEE Computer Society, 2012-01-01)
An academic processor to be used in the “Computer Structure” subject has been developed in this work. During the lab ... |
Article
Long-term on-chip verification of systems with logical events scattered in time
(Elsevier, 2012-01-01)
Traditional on-chip and off-chip logic analyzers present important shortcomings when used for the longterm verification ... |
PhD Thesis
Diseño e Implementación sobre FPGA de Sistemas Digitales de bajo coste para la Sincronización de Equipos sobre Redes de Comunicación usando el protocolo SNTP
(2011-01-01)
En este documento se presenta el trabajo de tesis doctoral realizado dentro del Programa de Doctorado "Informática Industrial" ... |
Presentation
Implementation of a configuration server for a hardware SNTP synchronization platform based on FPGA
(IEEE Computer Society, 2011-01-01)
This paper presents the implementation of a configuration server for a SNTP synchronization platform which implements accurate ... |
Article
Fast-Convergence Microsecond-Accurate Clock Discipline Algorithm for Hardware Implementation
(IEEE Computer Society, 2011-01-01)
Discrete microprocessor-based equipment is a typical synchronization system on the market which implements the most ... |
Presentation
Python as a hardware description language: A case study
(IEEE Computer Society, 2011-01-01)
Many people may see the development of software and hardware like different disciplines. However, there are great similarities ... |
Presentation
Design and implementation of a suitable core for on-chip long-term verification
(IEEE Computer Society, 2010-01-01)
Traditional on-chip and off-chip logic analyzers present important shortcomings when used for the long-term verification ... |
Presentation
Implementación sobre FPGA de un cliente SNTP de bajo coste y alta precisión
(Universidad de Alcalá, 2009-01-01)
Este trabajo presenta el diseño y la implementación sobre FPGA de un cliente SNTP compacto, de bajo coste y alta precisión, ... |
Presentation
La primera experiencia en el diseño de sistemas digitales sobre FPGAs
(Universidad de Zaragoza, 2008-01-01)
Se presenta una práctica de introducción al diseño de sistemas digitales sobre FPGAs. El objetivo es que se pueda realizar ... |
Presentation
Digital Data Processing Peripheral Design for an Embedded Application based on the Microblaze Soft Core
(IEEE Computer Society, 2008-01-01)
In this paper we present a design of a peripheral for MicroBlaze soft core processor as part of a R+D project carried out ... |
Presentation
La primera experiencia en el diseño de sistemas digitales sobre FPGAs
(Universidad Politécnica de Madrid, 2008-01-01)
Se presenta una práctica de introducción al diseño de sistemas digitales sobre FPGAs. El objetivo es que se pueda realizar ... |
Chapter of Book
Power Dissipation Associated to Internal Effect Transitions in Static CMOS Gates
(Springer, 2008-01-01)
Power modeling techniques have traditionally neglected the main part of the energy consumed in the internal nodes of static ... |
Presentation
Implementation of a FFT/IFFT Module on FPGA: Comparison of Methodologies
(IEEE Computer Society, 2008-01-01)
In this work, we have compared three different methodologies for the implementation of a FFT/IFFT module on FPGA: VHDL ... |
Presentation
Desarrollo de una interfaz RS-232 para el manejo de un coche de radiocontrol desde el PC
(Universidad de Zaragoza, 2008-01-01)
Este trabajo presenta el desarrollo de un sistema de radiocontrol para un coche teledirigido. Se trata de un circuito que, ... |
Presentation
Design and Implementation of a SNTP Client on FPGA
(IEEE Computer Society, 2008-01-01)
This contribution presents the design and implementation of a SNTP client module suitable for IEC 61850 environments fully ... |
Presentation
Design of a FFT/IFFT module as an IP core suitable for embedded systems
(IEEE Computer Society, 2007-01-01)
In this work, we have laid the foundations that allow us to accomplish the implementation of a FFT/IFFT module as an IP ... |
Chapter of Book
Static Power Consumption in CMOS Gates Using Independent Bodies
(Springer, 2007-01-01)
It has been reported that the use of independent body terminals for series transistors in static bulk-CMOS gates improves ... |
Presentation
Automatic logic synthesis for parallel alternating latches clocking schemes
(SPIE Digital Library, 2007-01-01)
This paper proposes a VHDL coding technique that allows for the automatic synthesis of digital circuits using the so called ... |
Presentation
A SoC Design Methodology for LEON2 on FPGA
(IBERCHIP, 2006-01-01)
SoC design methodologies show up as a natural and productive method to implement embedded and/or ubiquitous systems. The ... |
Presentation
Diseño e Implementación Óptima de Periféricos de DSP con System Generator para Microblaze
(IBERCHIP, 2006-01-01)
Con este trabajo pretendemos analizar como se lleva a cabo el diseño de periféricos de DSP utilizando uno de los nuevos ... |
Presentation
Diseño e implantación de SoPC basados en el microprocesador PicoBlaze
(Universidad Politécnica de Madrid, 2006-01-01)
Con este trabajo pretendemos realizar una aportación a la docencia de la materias que cu bren el diseño de SoPC (System ... |
Presentation
Efficient Design and Implementation on FPGA of a MicroBlaze Peripheral for Processing Direct Electrical Networks Measurements
(IEEE Computer Society, 2006-01-01)
This contribution successfully accomplished the design and implementation of an advanced DSP circuit for direct measurements ... |
Presentation
Diseño e implementación de SOPC basados en el microprocesador Picoblaze
(Universidad Politécnica de Madrid, 2006-01-01)
Con este trabajo pretendemos realizar una aportación a la docencia de la materias que cubren el diseño de SoPC (System on ... |
Presentation
Desarrollo en VHDL de un filtro digital genérico basado en estructuras canónicas.
(Universidad Politécnica de Madrid, 2006-01-01)
Este trabajo abarca la realización de un filtro digital a bajo nivel. El diseño propuesto se basa en la utilización de un ... |
Article
Automated performance evaluation of skew-tolerant clocking schemes
(Taylor and Francis Online, 2006-01-01)
In this paper the authors evaluate the timing and power performance of three skew-tolerant clocking schemes. These schemes ... |
Presentation
Efficient Design of a FFT/IFFT-64 Module on ASIC
(IBERCHIP, 2005-01-01)
In this work we present the VHDL implementation of a FFT/IFFT-64 module. This implementation: (a) is relatively quick and ... |
Article
Application of Internode model to global power consumption estimation in SCMOS gates
(Springer, 2005-01-01)
In this paper, we present a model, Internode, that unifies the gate functional behavior and the dynamic one. It is based ... |
Presentation
Algorithms to get the maximum operation frequency for skew-tolerant clocking schemes
(Society of Photo-Optical Instrumentation Engineers (SPIE), 2005-01-01)
Nowadays it is not possible to neglect the delay of interconnection lines. The die size is rising very fast, and the delay ... |
Chapter of Book
Logic-Level Fast Current Simulation for Digital CMOS Circuits
(Springer, 2005-01-01)
Nowadays, verification of digital integrated circuit has been focused more and more from the timing and area field to ... |