Ponencia
A 0.35μm CMOS 17-bit@40kS/s Sensor A/D Interface Based on a Programmable-Gain Cascade 2-1 ΣΔ Modulator
Autor/es | García González, José Manuel
Escalera Morón, Sara Rosa Utrera, José Manuel de la Guerra Vinuesa, Oscar Medeiro Hidalgo, Fernando Río Fernández, Rocío del Pérez Verdú, Belén Rodríguez Vázquez, Ángel Benito |
Departamento | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo |
Fecha de publicación | 2004 |
Fecha de depósito | 2019-09-19 |
Publicado en |
|
Resumen | This paper describes the design and electrical implementation of an A/D interface for sensor applications realized in a 0.35μm standard CMOS technology. The circuit is composed of a low-noise instrumentation preamplifier ... This paper describes the design and electrical implementation of an A/D interface for sensor applications realized in a 0.35μm standard CMOS technology. The circuit is composed of a low-noise instrumentation preamplifier and a SC cascade (2-1) ΣΔ modulator. The preamplifier, based on hybrid Nested-Miller compensated four-stage opamps, has a fixed gain of 10 and it is capable of handling signals with 20kHz-bandwidth and amplitudes ranging from μVs to hundreds of mVs with a signal-to-(noise+distortion) ratio over 100dB. The modulator architecture has a programmable gain for a better fitting to the characteristics of different sensor outputs. The design of both circuits is based upon a top-down CAD methodology which combines simulation and statistical optimization at different levels of the interface hierarchy. Simulation results show 17-bit@40kS/s for all cases of the modulator gain. |
Identificador del proyecto | 2001-34283/TAMES-2
TIC2001-0929/ADAVERE |
Cita | García González, J.M., Escalera Morón, S., Rosa Utrera, J.M.d.l., Guerra Vinuesa, O., Medeiro Hidalgo, F., Río Fernández, R.d.,...,Rodríguez Vázquez, Á.B. (2004). A 0.35μm CMOS 17-bit@40kS/s Sensor A/D Interface Based on a Programmable-Gain Cascade 2-1 ΣΔ Modulator. En Proceedings of the 2004 International Symposium on Circuits and Systems (ISCAS) (I.205-I.208), Vancouver, Canadá: Institute of Electrical and Electronics Engineers. |
Ficheros | Tamaño | Formato | Ver | Descripción |
---|---|---|---|---|
A 0.35μm CMOS 17-bit.pdf | 332.4Kb | [PDF] | Ver/ | |