dc.creator | García González, José Manuel | es |
dc.creator | Escalera Morón, Sara | es |
dc.creator | Rosa Utrera, José Manuel de la | es |
dc.creator | Guerra Vinuesa, Oscar | es |
dc.creator | Medeiro Hidalgo, Fernando | es |
dc.creator | Río Fernández, Rocío del | es |
dc.creator | Pérez Verdú, Belén | es |
dc.creator | Rodríguez Vázquez, Ángel Benito | es |
dc.date.accessioned | 2019-09-19T14:28:49Z | |
dc.date.available | 2019-09-19T14:28:49Z | |
dc.date.issued | 2004 | |
dc.identifier.citation | García González, J.M., Escalera Morón, S., Rosa Utrera, J.M.d.l., Guerra Vinuesa, O., Medeiro Hidalgo, F., Río Fernández, R.d.,...,Rodríguez Vázquez, Á.B. (2004). A 0.35μm CMOS 17-bit@40kS/s Sensor A/D Interface Based on a Programmable-Gain Cascade 2-1 ΣΔ Modulator. En Proceedings of the 2004 International Symposium on Circuits and Systems (ISCAS) (I.205-I.208), Vancouver, Canadá: Institute of Electrical and Electronics Engineers. | |
dc.identifier.uri | https://hdl.handle.net/11441/89210 | |
dc.description.abstract | This paper describes the design and electrical implementation of an A/D interface for sensor applications realized in a 0.35μm standard CMOS technology. The circuit is composed of a low-noise instrumentation preamplifier and a SC cascade (2-1) ΣΔ modulator. The preamplifier, based on hybrid Nested-Miller compensated four-stage opamps, has a fixed gain of 10 and it is capable of handling signals with 20kHz-bandwidth and amplitudes ranging from μVs to hundreds of mVs with a signal-to-(noise+distortion) ratio over 100dB. The modulator architecture has a programmable gain for a better fitting to the characteristics of different sensor outputs. The design of both circuits is based upon a top-down CAD methodology which combines simulation and statistical optimization at different levels of the interface hierarchy. Simulation results show 17-bit@40kS/s for all cases of the modulator gain. | es |
dc.description.sponsorship | European Union 2001-34283/TAMES-2 | es |
dc.description.sponsorship | Comisión Interministerial de Ciencia y Tecnología TIC2001-0929/ADAVERE | es |
dc.format | application/pdf | es |
dc.language.iso | eng | es |
dc.publisher | Institute of Electrical and Electronics Engineers | es |
dc.relation.ispartof | Proceedings of the 2004 International Symposium on Circuits and Systems (ISCAS) (2004), p I.205-I.208 | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.subject | Sigma-Delta Modulator | es |
dc.subject | Automotive | es |
dc.subject | Sensor Interface | es |
dc.subject | Analog-to-Digital Converters | es |
dc.title | A 0.35μm CMOS 17-bit@40kS/s Sensor A/D Interface Based on a Programmable-Gain Cascade 2-1 ΣΔ Modulator | es |
dc.type | info:eu-repo/semantics/conferenceObject | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/acceptedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo | es |
dc.relation.projectID | 2001-34283/TAMES-2 | es |
dc.relation.projectID | TIC2001-0929/ADAVERE | es |
idus.format.extent | 4 p. | es |
dc.publication.initialPage | I.205 | es |
dc.publication.endPage | I.208 | es |
dc.eventtitle | Proceedings of the 2004 International Symposium on Circuits and Systems (ISCAS) | es |
dc.eventinstitution | Vancouver, Canadá | es |
dc.identifier.sisius | 5539538 | es |