Perfil del autor: Guerra Vinuesa, Oscar
Datos institucionales
Nombre | Guerra Vinuesa, Oscar |
Departamento | Electrónica y Electromagnetismo |
Área de conocimiento | Electrónica |
Categoría profesional | Profesor Titular de Universidad |
Correo electrónico | Solicitar |
Estadísticas
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Nº publicaciones
16
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Nº visitas
1365
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Nº descargas
1620
Publicaciones |
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Artículo
Characterization-Based Modeling of Retriggering and Afterpulsing for Passively Quenched CMOS SPADs
(Institute of Electrical and Electronics Engineers, 2019)
The current trend in the design of systems based on CMOS SPADs is to adopt smaller technological nodes, allowing the ... |
Ponencia
Effects of capacitors non-idealities in un-even split-capacitor array SAR ADCs
(Institute of Electrical and Electronics Engineers, 2016)
This paper studies the effects of capacitors non-idealities in the performance of un-even split-capacitor SAR ADCs. Also, ... |
Ponencia
5×5 SPAD matrices for the study of the trade-offs between fill factor, dark count rate and crosstalk in the design of CMOS image sensors
(Institute of Electrical and Electronics Engineers, 2014)
CMOS Single Photon Avalanche Diodes (SPADs) are a dedicated type of photodetectors that are attracting increasing interest. ... |
Ponencia
CMOS SPADs selection, modeling and characterization towards image sensors implementation
(Institute of Electrical and Electronics Engineers, 2012)
The selection, modeling and characterization of Single Photon Avalanche Diodes (SPADs) are presented. Working with the ... |
Artículo
A CMOS 110-dB@40-kS/s programmable-gain chopper-stabilized third-order 2-1 cascade sigma-selta modulator for low-power high-linearity automotive aensor ASICs
(Institute of Electrical and Electronics Engineers, 2005)
This paper describes a 0.35-μm CMOS chopper-stabilized switched-capacitor 2-1 cascade ΣΔ modulator for automotive sensor ... |
Ponencia
A 0.35 μm CMOS 17-bit@40-kS/s cascade 2-1 ΣΔ modulator with programmable gain and programmable chopper stabilization
(The International Society for Optical Engineering - SPIE, 2005)
This paper describes a 0.35μm CMOS chopper-stabilized Switched-Capacitor 2-1 cascade ΣDelta; modulator for automotive ... |
Ponencia
A 0.35μm CMOS 17-bit@40kS/s Sensor A/D Interface Based on a Programmable-Gain Cascade 2-1 ΣΔ Modulator
(Institute of Electrical and Electronics Engineers, 2004)
This paper describes the design and electrical implementation of an A/D interface for sensor applications realized in a ... |
Ponencia
An Alternative DfT Methodology to Test High-Resolution ΣΔ Modulators
(Institute of Electrical and Electronics Engineers, 2004)
In this paper, a novel DfT methodology to test high-resolution ΣΔ Modulators (ΣΔM) is introduced. The aim of the proposal ... |
Ponencia
On the development of a MODEM for data transmission and control of electrical household appliances using the low-voltage power-line
(Institute of Electrical and Electronics Engineers, 2003)
This paper presents a CMOS 0,6μm mixed-signal MODEM ASIC for data transmission on the low-voltage power line. The circuit ... |
Ponencia
CMOS mixed-signal MODEM for data transmission and control of electrical household appliances using the low-voltage power-line
(The International Society for Optical Engineering - SPIE, 2003)
This paper presents a CMOS 0.6μm mixed-signal MODEM ASIC for data transmission using the low-voltage power line. This ... |
Ponencia
An error-controlled methodology for approximate hierarchical symbolic analysis
(Institute of Electrical and Electronics Engineers, 2000)
Limitations of existing approaches for symbolic analysis of large analog circuits are discussed. To address their solution, ... |
Ponencia
Selection of test techniques for high-resolution ΣΔ modulators
(2000)
This paper introduces a new tool which allows the evaluation of different test techniques in a complete impartial manner. ... |
Ponencia
A hierarchical approach for the symbolic analysis of large analog integrated circuits
(IEEE computer society digital library, 2000)
This paper introduces a new hierarchical analysis methodology which incorporates approximation strategies during the ... |
Ponencia
An accurate error control mechanism for simplification before generation algorithms
(Institute of Electrical and Electronics Engineers, 1999)
The use of simplification before generation techniques to enable the approximate symbolic analysis of large analog circuits ... |
Artículo
Error control in simplification before generation algorithms for symbolic analysis of large analogue circuits
(Institution of Engineering and Technology, 1999)
Circuit reduction is a fundamental first step in addressing the symbolic analysis of large analogue circuits. A new algorithm ... |
Capítulo de Libro
Symbolic analysis of large analog integrated circuits: the numerical reference generation problem
(IEEE press, 1998)
Symbolic analysis potentialities for gaining circuit insight and for efficient repetitive evaluations have been limited ... |