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Ponencia
Methodology Updating Experience in Basic Digital Electronics Teaching
(IEEE Computer Society, 2012)
This contribution describes the experience of updating a basic digital electronics course in a Computer Science grade as a consequence of the new grades introduced by the European Higher Education Area (EHEA) in a Spanish ...
Ponencia
Delay degradation effect in submicronic CMOS inverters
(Université Catholique de Louvain, 1997)
This communication presents the evidence of a degradation effect causing important reductions in the delay of a CMOS inverter when consecutive input transition are close in time. Complete understanding of the effect is ...
Ponencia
Digital Data Processing Peripheral Design for an Embedded Application based on the Microblaze Soft Core
(IEEE Computer Society, 2008)
In this paper we present a design of a peripheral for MicroBlaze soft core processor as part of a R+D project carried out in cooperation with three different companies. The objective of the project consisted in the ...
Ponencia
Virtualization environment for IT labs development and assessment
(IEE Xplore, 2022)
In this contribution, the advantages of using a virtualization platform for IT laboratories is demonstrated. The platform used is based on free (open-source) software and present important advantages with respect to previous ...
Ponencia
Internode: Internal Node Logic Computational Model
(IEEE Computer Society, 2003)
In this work, we present a computational behavioral model for logic gates called Internode (Internal Node Logic Computational Model) that considers the functionality of the gate as well as all the different internal ...
Ponencia
Inertial and Degradation Delay Model for CMOS Logic Gates
(IEEE Computer Society, 2000)
The authors present the Inertial and Degradation Delay Model (IDDM) for CMOS digital simulation. The model combines the Degradation Delay Model presented in previous papers with a new algorithm to handle the inertial ...
Ponencia
La primera experiencia en el diseño de sistemas digitales sobre FPGAs
(Universidad Politécnica de Madrid, 2008)
Se presenta una práctica de introducción al diseño de sistemas digitales sobre FPGAs. El objetivo es que se pueda realizar en los primeros cursos dedicados a sistemas digitales, para que la formación no sea fundamentalmente ...
Ponencia
Diseño e implantación de SoPC basados en el microprocesador PicoBlaze
(Universidad Politécnica de Madrid, 2006)
Con este trabajo pretendemos realizar una aportación a la docencia de la materias que cu bren el diseño de SoPC (System on Programmable Chip). Para ello, hemos desarrollado un demostrador de diseño de un SoPC suficientemente ...
Capítulo de Libro
Network Time Synchronization: A Full Hardware Approach
(Springer, 2012)
Complex digital systems are typically built on top of several abstraction levels: digital, RTL, computer, operating system and software application. Each abstraction level greatly facilitates the design task at the cost ...
Ponencia
Efficient Design of a FFT/IFFT-64 Module on ASIC
(IBERCHIP, 2005)
In this work we present the VHDL implementation of a FFT/IFFT-64 module. This implementation: (a) is relatively quick and (b) occupies a limited amount of area. The module operation is based on a radix-8 butterfly and ...