Recent Submissions

  • Icon

    Designing a wearable device for step analyzing  [Presentation]

    Pineda Gutiérrez, Joaquín; Miró Amarante, María Lourdes; Hernández Velázquez, María Dolores; Sivianes Castillo, Francisco; Domínguez Morales, Manuel Jesús (IEEE Computer Society, 2019)
    During the locomotion, the foot is a contact surface and a source of interaction with the external environment. Because ...
  • Icon

    Optimization techniques for dynamic behavior modeling of digital CMOS VLSI circuits in nanometric technologies  [Presentation]

    Millán Calderón, Alejandro; Bellido Díaz, Manuel Jesús; Juan Chico, Jorge (IEEE Computer Society, 2005)
    In the field of logic simulation, the constant advance of technology influences remarkably in the circuits dynamic ...
  • Icon

    Delay degradation effect in submicronic CMOS inverters  [Presentation]

    Juan Chico, Jorge; Bellido Díaz, Manuel Jesús; Acosta Jiménez, Antonio José; Barriga Barros, Ángel; Valencia Barrero, Manuel (Université Catholique de Louvain, 1997)
    This communication presents the evidence of a degradation effect causing important reductions in the delay of a CMOS ...
  • Icon

    Python as a hardware description language: A case study  [Presentation]

    Villar de Ossorno, José Ignacio; Juan Chico, Jorge; Bellido Díaz, Manuel Jesús; Viejo Cortés, Julián; Guerrero Martos, David; Decaluwe, J. (IEEE Computer Society, 2011)
    Many people may see the development of software and hardware like different disciplines. However, there are great similarities ...
  • Icon

    Implementation of a hardware and software framework for a simple academic processor  [Presentation]

    Ruiz Páez, Jonathan; Guerrero Martos, David; Gómez González, Isabel María; Viejo Cortés, Julián (IEEE Computer Society, 2012)
    An academic processor to be used in the “Computer Structure” subject has been developed in this work. During the lab ...
  • Icon

    Implementation of a configuration server for a hardware SNTP synchronization platform based on FPGA  [Presentation]

    Quirós Carmona, Juan; Viejo Cortés, Julián; Millán Calderón, Alejandro; Muñoz Rivera, Alejandro; Villar de Ossorno, José Ignacio; Guerrero Martos, David (IEEE Computer Society, 2011)
    This paper presents the implementation of a configuration server for a SNTP synchronization platform which implements accurate ...
  • Icon

    evercodeML: a formal language for SoC integration  [Presentation]

    Villar de Ossorno, José Ignacio; Juan Chico, Jorge; Guerrero Martos, David; Bellido Díaz, Manuel Jesús; Viejo Cortés, Julián (IEEE Computer Society, 2015)
    Complex SoC design devote a great part of the developing time to module integration tasks. The necessity of automating ...
  • Icon

    Digital Data Processing Peripheral Design for an Embedded Application based on the Microblaze Soft Core  [Presentation]

    Ostúa Arangüena, Enrique; Viejo Cortés, Julián; Bellido Díaz, Manuel Jesús; Millán Calderón, Alejandro; Juan Chico, Jorge; Muñoz Rivera, Alejandro (IEEE Computer Society, 2008)
    In this paper we present a design of a peripheral for MicroBlaze soft core processor as part of a R+D project carried ...
  • Icon

    Automatic logic synthesis for parallel alternating latches clocking schemes  [Presentation]

    Guerrero Martos, David; Bellido Díaz, Manuel Jesús; Juan Chico, Jorge; Millán Calderón, Alejandro; Ruiz de Clavijo Vázquez, Paulino; Ostúa Arangüena, Enrique; Viejo Cortés, Julián (SPIE Digital Library, 2007)
    This paper proposes a VHDL coding technique that allows for the automatic synthesis of digital circuits using the so called ...
  • Icon

    Application of virtualization technology to the study of quality of service techniques  [Presentation]

    Quirós Carmona, Juan; Ruiz de Clavijo Vázquez, Paulino; Carrasco Muñoz, Alejandro; Viejo Cortés, Julián; Millán Calderón, Alejandro (IEEE Computer Society, 2014)
    In this article, the teaching of quality of service mechanisms in packet-switched networks is presented. To this end, a ...
  • Icon

    Aplicación de la Virtualización al estudio de técnicas de Calidad de Servicio - QoS  [Presentation]

    Quirós Carmona, Juan; Ruiz de Clavijo Vázquez, Paulino; Carrasco Muñoz, Alejandro; Viejo Cortés, Julián; Millán Calderón, Alejandro (Universidad de Deusto, 2014)
    Este trabajo abarca la aplicación de técnicas de calidad de servicio en redes de conmutación de paquetes. Para ello se ...
  • Icon

    Algorithms to get the maximum operation frequency for skew-tolerant clocking schemes  [Presentation]

    Guerrero Martos, David; Bellido Díaz, Manuel Jesús; Juan Chico, Jorge; Millán Calderón, Alejandro; Ruiz de Clavijo Vázquez, Paulino; Ostúa Arangüena, Enrique; Viejo Cortés, Julián (Society of Photo-Optical Instrumentation Engineers (SPIE), 2005)
    Nowadays it is not possible to neglect the delay of interconnection lines. The die size is rising very fast, and the delay ...
  • Icon

    Design of a FFT/IFFT module as an IP core suitable for embedded systems  [Presentation]

    Viejo Cortés, Julián; Millán Calderón, Alejandro; Bellido Díaz, Manuel Jesús; Juan Chico, Jorge; Ruiz de Clavijo Vázquez, Paulino; Guerrero Martos, David; Ostúa Arangüena, Enrique; Muñoz Rivera, Alejandro (IEEE Computer Society, 2007)
    In this work, we have laid the foundations that allow us to accomplish the implementation of a FFT/IFFT module as an IP ...
  • Icon

    Seguridad en Internet: web spoofing  [Presentation]

    Nuñez, José L.; Millán Calderón, Alejandro; Ruiz de Clavijo Vázquez, Paulino; Guerrero Martos, David; Ostúa Arangüena, Enrique; Bellido Díaz, Manuel Jesús; Juan Chico, Jorge (Universidad Politécnica de Valencia, 2004)
    En este trabajo se estudia la técnica Web Spoofing como método de ataque a través de Internet. Se trata de una variante ...
  • Icon

    Methodology Updating Experience in Basic Digital Electronics Teaching  [Presentation]

    Juan Chico, Jorge; Ostúa Arangüena, Enrique; Guerrero Martos, David (IEEE Computer Society, 2012)
    This contribution describes the experience of updating a basic digital electronics course in a Computer Science grade ...
  • Icon

    La primera experiencia en el diseño de sistemas digitales sobre FPGAs  [Presentation]

    Viejo Cortés, Julián; Ostúa Arangüena, Enrique; Bellido Díaz, Manuel Jesús; Juan Chico, Jorge; Guerrero Martos, David; Muñoz Rivera, Alejandro (Universidad de Zaragoza, 2008)
    Se presenta una práctica de introducción al diseño de sistemas digitales sobre FPGAs. El objetivo es que se pueda realizar ...
  • Icon

    Implementation of a FFT/IFFT Module on FPGA: Comparison of Methodologies  [Presentation]

    Viejo Cortés, Julián; Millán Calderón, Alejandro; Bellido Díaz, Manuel Jesús; Ostúa Arangüena, Enrique; Ruiz de Clavijo Vázquez, Paulino; Muñoz Rivera, Alejandro (IEEE Computer Society, 2008)
    In this work, we have compared three different methodologies for the implementation of a FFT/IFFT module on FPGA: VHDL ...
  • Icon

    Experiencia de renovación metodológica en la enseñanza de la electrónica digital básica  [Presentation]

    Juan Chico, Jorge; Ostúa Arangüena, Enrique; Guerrero Martos, David (Universidad de Vigo, 2012)
    Esta contribución presenta una experiencia sobre el proceso de adaptación de una asignatura de electrónica digital básica ...
  • Icon

    Efficient Design of a FFT/IFFT-64 Module on ASIC  [Presentation]

    Millán Calderón, Alejandro; Bellido Díaz, Manuel Jesús; Juan Chico, Jorge; Ruiz de Clavijo Vázquez, Paulino; Guerrero Martos, David; Ostúa Arangüena, Enrique; Viejo Cortés, Julián (IBERCHIP, 2005)
    In this work we present the VHDL implementation of a FFT/IFFT-64 module. This implementation: (a) is relatively quick ...
  • Icon

    Diseño e Implementación Óptima de Periféricos de DSP con System Generator para Microblaze  [Presentation]

    Viejo Cortés, Julián; Ostúa Arangüena, Enrique; Bellido Díaz, Manuel Jesús; Juan Chico, Jorge; Millán Calderón, Alejandro; Ruiz de Clavijo Vázquez, Paulino; Guerrero Martos, David (IBERCHIP, 2006)
    Con este trabajo pretendemos analizar como se lleva a cabo el diseño de periféricos de DSP utilizando uno de los nuevos ...

View more