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Ponencia
An Approach to Detection of Tampering in Water Meters
(Elsevier, 2015)
Meter tampering is defined as a fraudulent manipulation which implies a service that is not billed by a utility company. It is a lack of consumption control for the utility company and a main problem because they represent ...
Ponencia
A Precise Electrical Disturbance Generator for Neural Network Training with Real Level Output
(Springer, 2007)
Power Quality is defined as the study of the quality of electric power lines. The detection and classification of the different disturbances which cause power quality problems is a difficult task which requires a high ...
Artículo
Signal Sampling Based Transition Modeling for Digital Gates Characterization
(Springer, 2004)
Current characterization methods introduce an important error in the measurement process. In this paper, we present a novel method to drive the timing characterization of logic gates under variable input transition times. ...
Ponencia
Gate-Level Simulation of CMOS Circuits Using the IDDM Model
(IEEE Computer Society, 2001)
Timing verification of digital CMOS circuits is a key point in the design process. In this contribution we present the extension to gates of the Inertial and Degradation Delay Model for logic timing simulation which is ...
Artículo
ESTELLE: A Method to Analyze Automatically the Performance of Telecontrol Protocols in SCADA Systems
(IEEE Computer Society, 2002)
This paper presents the use of ESTELLE, a formal description technique, as a method to calculate automatically the performance of telecontrol protocols in SCADAsystems. Some specific primitives are added to the ESTELLE ...
Capítulo de Libro
Measurement of the Switching Activity of CMOS Digital Circuits at the Gate Level
(Springer, 2002)
Accurate estimation of switching activity is very important in digital circuits. In this paper we present a comparison between the evaluation of the switching activity calculated using logic (Verilog) and electrical (HSPICE) ...
Artículo
Characterization of Normal Propagation Delay for Delay Degradation Model (DDM)
(Springer, 2002-08-27)
In previous papers we have presented a very accurate model that handles the generation and propagation of glitches, which makes an important headway in logic timing simulation. This model is called Delay Degradation Model ...
Artículo
Deployment of Digital Video and Audio Over Electrical SCADA Networks
(IEEE Computer Society, 2005)
With the arrival of new hardware and software technologies, supervisory control and data acquisition human-machine interfaces (SCADA/HMI), usually text-based, can now benefit from the advantages the inclusion of multimedia ...
Ponencia
Remote Controlling and Monitoring of Safety Devices Using Web-Interface Embedded Systems
(Springer, 2009)
To date, access control systems have been hardware-based platforms, where software and hardware parts were uncoupled into different systems. The Department of Electronic Technology in the University of Seville, together ...
Ponencia
HALOTIS: high accuracy LOgic TIming simulator with inertial and degradation delay model
(IEEE Computer Society, 2001)
This communication presents HALOTIS, a novel high accuracy logic timing simulation tool, that incorporates a new simulation algorithm based on different concepts for transitions and events. This new simulation algorithm ...