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Ponencia
Convergence and stability of the FSR CNN model
(Institute of Electrical and Electronics Engineers, 1994)
Stability and convergency results are reported for a modified continuous-time CNN model. The signal range of the state variables is equal to the unitary interval, independently of the application. Stability and convergency ...
Artículo
Compensation of PVT Variations in ToF Imagers with In-Pixel TDC
(MDPI, 2017)
The design of a direct time-of-flight complementary metal-oxide-semiconductor (CMOS) image sensor (dToF-CIS) based on a single-photon avalanche-diode (SPAD) array with an in-pixel time-to-digital converter (TDC) must ...
Artículo
A Wide Linear Dynamic Range Image Sensor Based on Asynchronous Self-Reset and Tagging of Saturation Events
(Institute of Electrical and Electronics Engineers, 2017)
We report a high dynamic range (HDR) image sensor with a linear response that overcomes some of the limitations of sensors with pixels with self-reset operation. It operates similar to an active pixel sensor, but its pixels ...
Artículo
New analogue switch circuit having very low forward resistance
(Institution of Engineering and Technology, 1984)
A new circuit realisation for an analogue switch is reported. The main feature of the proposed design is the low value of the forward resistance as compared with commercial switches. Experimental data confirming the ...
Ponencia
A stored program 2/sup nd/ order/3-layer complex cell CNN-UM
(Institute of Electrical and Electronics Engineers, 2000)
A stored program 2/sup nd/ order/3-layer complex cell cellular neural network Universal Machine (CNN-UM) architecture is introduced. We discuss a number of phenomena that can be generated in this system by a single CNN ...
Ponencia
Wide range 8ps incremental resolution time interval generator based on FPGA technology
(Institute of Electrical and Electronics Engineers, 2014)
Accurate generation of picosecond-resolution wide-range time intervals has become a necessity for the characterization of time-to-digital converters involved in time resolved imaging. This paper presents the design and ...
Ponencia
Current-mode building blocks for CMOS-VLSI design of chaotic neural networks
(Institute of Electrical and Electronics Engineers, 1994)
This paper presents two nonlinear CMOS current-mode circuits that implement neuron soma equations for chaotic neural networks, and another circuit to realize programmable current-mode synapse using CMOS-compatible BJTs. ...
Ponencia
A mixed-signal early vision chip with embedded image and programming memories and digital I/O
(The International Society for Optical Engineering - SPIE, 2003)
From a system level perspective, this paper presents a 128 × 128 flexible and reconfigurable Focal-Plane Analog Programmable Array Processor, which has been designed as a single chip in a 0.35μm standard digital 1P-5M CMOS ...
Ponencia
Digital processor array implementation aspects of a 3D multi-layer vision architecture
(Institute of Electrical and Electronics Engineers, 2010)
Technological aspects of the 3D integration of a multilayer combined mixed-signal and digital sensor-processor array chip is described. The 3D integration raises the question of signal routing, power distribution, and heat ...
Artículo
A Customizable Thermographic Imaging System for Medical Image Acquisition and Processing
(Institute of Electrical and Electronics Engineers, 2022)
A custom system has been developed for medical image acquisition and processing in both the visible and the infrared (IR) bands. Unlike some non-customizable commercial devices, this system can easily be adapted to different ...