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Mostrando ítems 1-10 de 11
Ponencia
Reliable analysis of settling errors in SC integrators - application to high-speed low-power ΣΔ modulators design
(1999)
This paper presents a detailed study on the transient response of SC integrators taking into account the effects of amplifier finite gain-bandwidth product and slew-rate during, unlike previous models, both the integration ...
Artículo
SIRENA: A CAD environment for behavioural modelling and simulation of VLSI cellular neural network chips
(Wiley-Blackwell, 1999)
This paper presents SIRENA, a CAD environment for the simulation and modelling of mixed-signal VLSI parallel processing chips based on cellular neural networks. SIRENA includes capabilities for: (a) the description of ...
Ponencia
Mixed-signal map-configurable integrated chaos generator for digital communication systems
(2001)
In this paper, the methodological aspects for the design of mixed-signal map-configurable chaos generators are presented. Such techniques have been applied in the integration, embedded in a complete FM-DCSK modem, of a ...
Artículo
Multiplexing architecture for mixed-signal CMOS fuzzy controllers
(Institute of Electrical and Electronics Engineers, 1998)
Limited precision imposes limits on the complexity of analogue circuits, and hence fuzzy analogue controllers are usually oriented to fast low-power systems with low-medium complexity. A strategy to preserve most of the ...
Ponencia
Harmonic Distortion in Fully-Differential Switched-Current Sigma-Delta Modulators
(1999)
This paper presents a systematic analysis of the harmonic distortion in SD modulators (SDMs) implemented with fully-differential switched-current (SI) circuits. Closed form expressions are derived for the third-order ...
Artículo
A modular programmable CMOS analog fuzzy controller chip
(Institute of Electrical and Electronics Engineers, 1999)
We present a highly modular fuzzy inference analog CMOS chip architecture with on-chip digital progranirnability. This chip consists of the interconnection of parameterized instances of two different kind of blocks, namely ...
Ponencia
A 14-bit 4-MS/s Multi-bit Cascade Sigma-Delta Modulator in CMOS 0.35-um Digital Technology
(2000)
This paper presents a 4th-order 3-stage cascade SD modulator that achieves 14-bit dynamic range at 4MS/s using low oversampling ratio. It includes a programmable multi-bit quantizer in the last stage, providing 2-, 3-, ...
Artículo
A CMOS 0.8- µm transistor-only 1.63-MHz switched-current bandpass ΣΔ modulator for AM signal A/D conversion
(Institute of Electrical and Electronics Engineers, 2000)
This paper presents a CMOS 0.8-/spl mu/m switched-current (SI) fourth-order bandpass /spl Sigma//spl Delta/ modulator (BP-/spl Sigma//spl Delta/M) IC capable of handling signals up to 1.63 MHz with 105-bit resolution and ...
Artículo
Multi-bit cascade ΣΔ modulator for high-speed A/D conversion with reduced sensitivity to DAC errors
(Institute of Electrical and Electronics Engineers, 1998)
This paper presents a ΣΔ modulator (ΣΔM) which combines single-bit and multi-bit quantization in a cascade architecture to obtain high resolution with low oversampling ratio. It is less sensitive to the non-linearity of ...
Ponencia
Selection of test techniques for high-resolution ΣΔ modulators
(2000)
This paper introduces a new tool which allows the evaluation of different test techniques in a complete impartial manner. This tool has been applied to the selection of the best test technique for their application to ...