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Mostrando ítems 1-10 de 111
Ponencia
A stored program 2/sup nd/ order/3-layer complex cell CNN-UM
(Institute of Electrical and Electronics Engineers, 2000)
A stored program 2/sup nd/ order/3-layer complex cell cellular neural network Universal Machine (CNN-UM) architecture is introduced. We discuss a number of phenomena that can be generated in this system by a single CNN ...
Ponencia
A mixed-signal early vision chip with embedded image and programming memories and digital I/O
(The International Society for Optical Engineering - SPIE, 2003)
From a system level perspective, this paper presents a 128 × 128 flexible and reconfigurable Focal-Plane Analog Programmable Array Processor, which has been designed as a single chip in a 0.35μm standard digital 1P-5M CMOS ...
Ponencia
A Reuse-based framework for the design of analog and mixed-signal ICs
(The International Society for Optical Engineering -SPIE, 2005)
Despite the spectacular breakthroughs of the semiconductor industry, the ability to design integrated circuits (ICs) under stringent time-to-market (TTM) requirements is lagging behind integration capacity, so far keeping ...
Ponencia
Behavioral Modeling, Simulation and High-Level Synthesis of Pipeline A/D Converters
(2005)
This paper presents a MATLAB® toolbox for the time-domain simulation and high-level sizing of pipeline analog-to-digital converters. SIMULINK® C-coded S-functions are used to describe the behavioral models of all building ...
Artículo
Insect-vision inspired collision warning vision processor for automobiles
(Institute of Electrical and Electronics Engineers, 2008)
Vision is expected to play important roles for car safety enhancement. Imaging systems can be used to enlarging the vision field of the driver. For instance capturing and displaying views of hidden areas around the car ...
Ponencia
Design Considerations for Multistandard Cascade ΣΔ Modulators
(2005)
This paper discusses design considerations for cascade Sigma-Delta Modulators (ΣΔMs) included in multistandard wireless receivers. Four different standards are covered: GSM, Bluetooth, UMTS, and WLAN. A top-down design ...
Ponencia
Design of a 1.2-V Cascade Continuous-Time Sigma-Delta Modulator for Broadband Telecommunications
(Institute of Electrical and Electronics Engineers, 2006)
This paper presents the design of a continuous-time multibit cascade 2-2-1 sigma-delta modulator for broadband telecom systems.
Ponencia
Structure reconfigurability of the CNNUC3 for robust template operation
(Institute of Electrical and Electronics Engineers, 2000)
We demonstrate the importance of the reconfigurability of a 64/spl times/64 cells size CNN-UM chip. As we show, in such a high complexity mixed-signal VLSI circuit the switch and internal reference level reconfigurability ...
Ponencia
Reliable analysis of settling errors in SC integrators-application to the design of high-speed /spl Sigma//spl Delta/ modulators
(Institute of Electrical and Electronics Engineers, 2000)
This paper presents a detailed study on the transient response of SC integrators which takes into account the effects of amplifier finite gain-bandwidth product, slew-rate, and parasitic capacitances. Unlike previous models, ...
Ponencia
Geometrically-constrained, parasitic-aware synthesis of analog ICs
(The International Society for Optical Engineering - SPIE, 2005)
In order to speed up the design process of analog ICs, iterations between different design stages should be avoided as much as possible. More specifically, spins between electrical and physical synthesis should be reduced ...