Ponencia
A 2.5-V CMOS Wideband Sigma-Delta Modulator
Autor/es | Río Fernández, Rocío del
Medeiro Hidalgo, Fernando Rosa Utrera, José Manuel de la Pérez Verdú, Belén Rodríguez Vázquez, Ángel Benito |
Departamento | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo |
Fecha de publicación | 2003 |
Fecha de depósito | 2019-09-05 |
Publicado en |
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Resumen | A high-performance Sigma-Delta modulator for wireline communication applications is presenfed It employs a 4th-order cascade multi-bit architecfure that requires only 16 oversampling ratio, and has been implemented using ... A high-performance Sigma-Delta modulator for wireline communication applications is presenfed It employs a 4th-order cascade multi-bit architecfure that requires only 16 oversampling ratio, and has been implemented using fully-differential SC circuits in a 0.25-μm CMOS technology. Measurements show a dynamic range of 84dB operating at 2.2MS/s output rate, and 79dB at 4.4MS/s. The whole prototype dissipates 65.8mW from a 2.5-V supply. |
Identificador del proyecto | UM1-34283mAMES-2
TIC2001-0929/ADAVERE |
Cita | Río Fernández, R.d., Medeiro Hidalgo, F., Rosa Utrera, J.M.d.l., Pérez Verdú, B. y Rodríguez Vázquez, Á.B. (2003). A 2.5-V CMOS Wideband Sigma-Delta Modulator. En IEEE Instrumentation and Measurement Technology Conference (IMTC/2003) (224-228), Vail Colorado, USA: Institute of Electrical and Electronics Engineers. |
Ficheros | Tamaño | Formato | Ver | Descripción |
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A 2.5-V CMOS Wideband.pdf | 309.2Kb | [PDF] | Ver/ | |