Ponencia
Low-power differential logic gates for dpa resistant circuits
Autor/es | Tena Sánchez, Erica
Castro, Javier Acosta Jiménez, Antonio José |
Departamento | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo |
Fecha de publicación | 2014 |
Fecha de depósito | 2018-05-16 |
Publicado en |
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Resumen | Information leakaged by cryptosistems can be used
by third parties to reveal critical information using Side Channel
Attacks (SCAs). Differential Power Analysis (DPA) is a SCA
that uses the power consumption dependence ... Information leakaged by cryptosistems can be used by third parties to reveal critical information using Side Channel Attacks (SCAs). Differential Power Analysis (DPA) is a SCA that uses the power consumption dependence on the processed data. Designers widely use differential logic styles with constant power consumption to protect devices against DPA. However, the right use of such circuits needs a fully symmetric structure and layout, and to remove any memory effect that could leak information. In this paper we propose improved low-power gates that provide excellent results against DPA attacks. Simulationbased DPA attacks on Sbox9 are used to validate the effectiveness of the proposals. |
Identificador del proyecto | TEC2010-16870
IPT2012-0695-390000 TEC2013-45523-R |
Cita | Tena Sánchez, E., Castro, J. y Acosta Jiménez, A.J. (2014). Low-power differential logic gates for dpa resistant circuits. En 17th Euromicro Conference on Digital System Design (DSD) (671-674), Verona (Italia): Institute of Electrical and Electronics Engineers. |
Ficheros | Tamaño | Formato | Ver | Descripción |
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Low-Power Differential.pdf | 1.295Mb | [PDF] | Ver/ | |