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Low-power differential logic gates for dpa resistant circuits

 

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Author: Tena Sánchez, Erica
Castro, Javier
Acosta Jiménez, Antonio José
Department: Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo
Date: 2014
Published in: 17th Euromicro Conference on Digital System Design (DSD) (2014), p 671-674
Document type: Presentation
Abstract: Information leakaged by cryptosistems can be used by third parties to reveal critical information using Side Channel Attacks (SCAs). Differential Power Analysis (DPA) is a SCA that uses the power consumption dependence on the processed data. Designers widely use differential logic styles with constant power consumption to protect devices against DPA. However, the right use of such circuits needs a fully symmetric structure and layout, and to remove any memory effect that could leak information. In this paper we propose improved low-power gates that provide excellent results against DPA attacks. Simulationbased DPA attacks on Sbox9 are used to validate the effectiveness of the proposals.
Cite: Tena Sánchez, E., Castro, J. y Acosta Jiménez, A.J. (2014). Low-power differential logic gates for dpa resistant circuits. En 17th Euromicro Conference on Digital System Design (DSD) (671-674), Verona (Italia): Institute of Electrical and Electronics Engineers.
Size: 1.295Mb
Format: PDF

URI: https://hdl.handle.net/11441/74700

DOI: 10.1109/DSD.2014.72

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