Author profile: Tena Sánchez, Erica
Data
Name | Tena Sánchez, Erica |
Department | Tecnología Electrónica |
Knowledge area | Tecnología Electrónica |
Professional category | Profesora Ayudante Doctora |
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Items
19
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1588
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2133
Publications |
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Article
![]() Hardware Countermeasures Benchmarking Against Fault Attacks
(MDPI, 2022-02-01)
The development of differential fault analysis (DFA) techniques and mechanisms to inject faults into cryptographic circuits ... |
Article
![]() Gate-Level Hardware Countermeasure Comparison against Power Analysis Attacks
(MDPI, 2022-02-01)
The fast settlement of privacy and secure operations in the Internet of Things (IoT) is appealing in the selection of ... |
Chapter of Book
![]() Design and security evaluation of secure cryptoharware (FPGA and ASIC) against hackers exploiting side-channel information
(3ciencias, 2022-02-01)
Tradicionalmente, la seguridad en los dispositivos criptográficos estaba ligada exclusivamente a la fortaleza del algoritmo. ... |
Chapter of Book
![]() Metodología de diseño para la detección de fallos en cifradores de bloques basada en códigos de Hamming
(3ciencias, 2022-02-01)
La inserción de fallos y en concreto los análisis diferenciales de fallos (Differential Fault Analysis – DFA) se han ... |
Article
![]() Trivium Stream Cipher Countermeasures Against Fault Injection Attacks and DFA
(Institute of Electrical and Electronics Engineers. IEEE, 2021-12-01)
Attacks on cryptocircuits are becoming increasingly sophisticated, requiring designers to include more and more countermeasures ... |
Article
![]() Experimental FIA Methodology Using Clock and Control Signal Modifications under Power Supply and Temperature Variations
(MDPI, 2021-11-01)
The security of cryptocircuits is determined not only for their mathematical formulation, but for their physical implementation. ... |
Article
![]() Gate-Level Design Methodology for Side-Channel Resistant Logic Styles Using TFETs
(IEEE, 2021-01-01)
The design of secure circuits in emerging technologies is an appealing area that requires new efforts and attention as an ... |
Master's Final Project
![]() Establecimiento y medida de figuras de seguridad criptográfica en función de la potencia
(2021-01-01)
Los ataques de canal lateral se utlizan para revelar datos secretos de dispositvos criptográfcos mediante la extracción ... |
Master's Final Project |
Presentation
![]() Hamming-code based fault detection design methodology for block ciphers
(IEEE Computer Society, 2020-01-01)
Fault injection, in particular Differential Fault Analysis (DFA), has become one of the main methods for exploiting ... |
PhD Thesis
![]() Diseño y caracterización de criptocircuitos seguros y resistentes a ataques físicos.
(2019-03-11)
A diario personas de todo el mundo hacen uso de dispositivos electrónicos en los que almacenan o con los que intercambian ... |
Final Degree Project |
Final Degree Project |
Final Degree Project
![]() Procesado de señales eléctricas para la optimización de ataques laterales en circuitos criptográficos
(2016-01-01)
Existen diversas formas de romper la seguridad de un sistema criptográfico. Una de ellas son los ataques de canal lateral ... |
Presentation
![]() Diseño de circuitos integrados y seguridad de circuitos criptográficos frente a ataques
(Área de Innovación y Desarrollo, 2016-01-01)
Muchos sistemas electrónicos incorporan dispositivos criptográficos que implementan algoritmos que cifran la información ... |
Presentation
![]() Low-power differential logic gates for dpa resistant circuits
(Institute of Electrical and Electronics Engineers, 2014-01-01)
Information leakaged by cryptosistems can be used by third parties to reveal critical information using Side Channel Attacks ... |
Article
![]() A Programmable and Configurable ASIC to Generate Piecewise-Affine Functions Defined Over General Partitions
(IEEE Computer Society, 2013-01-01)
This paper presents a programmable and configurable architecture and its inclusion in an Application Specific Integrated ... |
Presentation
![]() Reducing bit flipping problems in SRAM physical unclonable functions for chip identification
(Institute of Electrical and Electronics Engineers, 2012-01-01)
Physical Unclonable functions (PUFs) have appeared as a promising solution to provide security in hardware. SRAM PUFs offer ... |
Presentation
![]() ASIC-in-the-loop methodology for verification of piecewise affine controllers
(Institute of Electrical and Electronics Engineers, 2012-01-01)
This paper exposes a hardware-in-the-loop metho- dology to verify the performance of a programmable and confi- gurable ... |