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Poisson AER generator: Inter-Spike-Intervals Analysis

Opened Access Poisson AER generator: Inter-Spike-Intervals Analysis

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Autor: Linares Barranco, Alejandro
Cascado Caballero, Daniel
Jiménez Moreno, Gabriel
Civit Balcells, Antón
Oster, Matthias
Linares Barranco, Bernabé
Departamento: Universidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadores
Fecha: 2006
Publicado en: ISCAS 2006: IEEE International Symposium on Circuits and Systems (2006), p 3149-3152
ISBN/ISSN: 0-7803-9389-9
Tipo de documento: Ponencia
Resumen: Address-event-representation (AER) is a communication protocol for transferring asynchronous events between VLSI chips, originally developed for bio-inspired processing systems (for example, image processing). Such systems may consist of a complicated hierarchical structure with many chips that transmit data among them in real time, while performing some processing (for example, convolutions). To develop AER based systems for image processing it is very convenient to have available some kind of tool for generating AER streams from on-computer stored images. In this paper we present a hardware method for generating AER streams with Poisson statistics in real time from a sequence of images stored in a computer's memory. We quantify that the events generated follow a Poisson distribution using the Kolmogorov-Smirnov test. We have developed a USB-AER board, based on the Xilinx Spartan II FPGA and the Cygnal 8051 microcontroller, developed by our RTCAR group have been used for the analysis
Cita: Linares Barranco, A., Cascado Caballero, D., Jiménez Moreno, G., Civit Balcells, A., Oster, M. y Linares Barranco, B. (2006). Poisson AER generator: Inter-Spike-Intervals Analysis. En ISCAS 2006: IEEE International Symposium on Circuits and Systems (3149-3152), Island of Kos, Greece: IEEE Computer Society.
Tamaño: 1.520Mb
Formato: PDF

URI: https://hdl.handle.net/11441/74553

DOI: 10.1109/ISCAS.2006.1693293

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