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Inter-spike-intervals Analysis of Poisson Like Hardware Synthetic AER Generation

 

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Opened Access Inter-spike-intervals Analysis of Poisson Like Hardware Synthetic AER Generation
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Author: Linares Barranco, Alejandro
Oster, Matthias
Cascado Caballero, Daniel
Jiménez Moreno, Gabriel
Civit Balcells, Antón
Linares Barranco, Bernabé
Department: Universidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadores
Date: 2005
Published in: IWANN 2025: 8th International Work-Conference on Artificial Neural Networks (2005), p 479-485
ISBN/ISSN: 978-3-540-26208-4
0302-9743
Document type: Presentation
Abstract: Address-Event-Representation (AER) is a communication protocol for transferring images between chips, originally developed for bio-inspired image processing systems. Such systems may consist of a complicated hierarchical structure with many chips that transmit images among them in real time, while performing some processing (for example, convolutions). In developing AER based systems it is very convenient to have available some kind of means of generating AER streams from on-computer stored images. In this paper we present a hardware method for generating AER streams in real time from a sequence of images stored in a computer’s memory. The Kolmogorov-Smirnov test has been applied to quantify that this method follows a Poisson distribution of the spikes. A USB-AER board and a PCI-AER board, developed by our RTCAR group, have been used.
Cite: Linares Barranco, A., Oster, M., Cascado Caballero, D., Jiménez Moreno, G., Civit Balcells, A. y Linares Barranco, B. (2005). Inter-spike-intervals Analysis of Poisson Like Hardware Synthetic AER Generation. En IWANN 2025: 8th International Work-Conference on Artificial Neural Networks (479-485), Vilanova i la Geltrú, Barcelona: Springer.
Size: 222.4Kb
Format: PDF

URI: https://hdl.handle.net/11441/74492

DOI: 10.1007/11494669_59

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