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Alternate test of LNAs through ensemble learning of on-chip digital envelope signatures

 

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Opened Access Alternate test of LNAs through ensemble learning of on-chip digital envelope signatures
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Author: Barragán Villarejo, Manuel
Léger, Gildas
Rueda Rueda, Adoración
Huertas Díaz, José Luis
Department: Universidad de Sevilla. Departamento de Ingeniería Eléctrica
Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo
Date: 2011-01-06
Published in: Journal of Electronic Testing, 27 (3), 277-288.
Document type: Article
Abstract: This paper presents a novel and low-cost methodology for testing embedded Low Noise Amplifiers (LNAs). It is based on the detection and analysis of the response envelope of the Device Under Test (DUT) to a two-tone input signal. The envelope signal is processed to obtain a digital signature sensitive to key specifications of the DUT. An optimized regression model based on ensemble learning is used to relate the digital signatures to the target specifications. A new Figure of Merit (FOM) is proposed to evaluate the prediction accuracy of the statistical model, and a demonstrator has been developed to prove the feasibility of the approach. This demonstrator features a 2.445 GHz low-power LNA and a simple envelope detector, and has been developed in a 90 nm CMOS technology. Post-layout simulations are provided to verify the functionality of the proposed test technique.
Cite: Barragán Villarejo, M., Leger Leger, G., Rueda Rueda, A. y Huertas Díaz, J.L. (2011). Alternate test of LNAs through ensemble learning of on-chip digital envelope signatures. Journal of Electronic Testing, 27 (3), 277-288.
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URI: http://hdl.handle.net/11441/66491

DOI: 10.1007/s10836-010-5193-4

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