Browsing Artículos (Electrónica y Electromagnetismo) by Title
Now showing items 1-20 of 451
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Article
2-D analysis of leakage in printed-circuit lines using discrete complex-images technique
(Institute of Electrical and Electronics Engineers, 2002)The mixed-potential integral equation is combined with the discrete complex-images technique to analyze the complete ...
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A 0.9-V 100-mu W Feedforward Adder-Less Inverter-Based MASH Delta Sigma Modulator With 91-dB Dynamic Range and 20-kHz Bandwidth
(Institute of Electrical and Electronics Engineers, 2018)A 0.9-V ΔΣ modulator integrated into a 0.18-μm CMOS technology for digitizing signals in low-power devices is presented ...
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Article
A 10-MHz BW 77.3-dB SNDR 640-MS/s GRO-Based CT MASH Delta Sigma Modulator
(Institute of Electrical and Electronics Engineers, 2020)We present in this brief a novel multi-stage noiseshaping (MASH) 3-1 continuous-time (CT) delta-sigma modulator (M) with ...
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Article
A 12-Bit Low-Input Capacitance SAR ADC With a Rail-to-Rail Comparator
(IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 2023)The input capacitance of the SAR ADC is considered a drawback in many applications. In this paper, a 12-bit low-power SAR ...
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A 2-MS/s, 11.22 ENOB, Extended Input Range SAR ADC With Improved DNL and Offset Calculation
(Institute of Electrical and Electronics Engineers, 2018)Abstract— A 12-bit successive approximation register analogto-digital converter (ADC) with extended input range is presented. ...
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A 3-D Chip Architecture for Optical Sensing and Concurrent Processing
(SPIE, 2010)This paper presents an architecture for the implementation of vision chips in 3-D integration technologies. This ...
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A 32-Channel Time-Multiplexed Artifact-Aware Neural Recording System
(Institute of Electrical and Electronics Engineers, 2021)This paper presents a low-power, low-noise microsystem for the recording of neural local field potentials or ...
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A 4.2–13.2 V, on-chip, regulated, DC–DC converter in a standard 1.8V/3.3V CMOS process
(Elsevier, 2023)This paper presents a fully on-chip HV-regulated DC–DC boost converter for the power management unit of an electrical ...
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A CMOL-Like Memristor-CMOS Neuromorphic Chip-Core Demonstrating Stochastic Binary STDP
(Institute of Electrical and Electronics Engineers Inc., 2022-12)The advent of nanoscale memristors raised hopes of being able to build CMOL (CMOS/nanowire/molecular) type ultra-dense ...
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A CMOS-compatible oscillation-based VO2 Ising machine solver
(Springer Nature, 2024-04-18)Phase-encoded oscillating neural networks offer compelling advantages over metal-oxide-semiconductor-based technology for ...
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A Customizable Thermographic Imaging System for Medical Image Acquisition and Processing
(Institute of Electrical and Electronics Engineers, 2022)A custom system has been developed for medical image acquisition and processing in both the visible and the infrared (IR) ...
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A design tool for high-resolution high-frequency cascade continuous- time Σ∆ modulators
(SPIE, 2007)This paper introduces a CAD methodology to assist the de signer in the implementation of continuous-time (CT) cas- cade ...
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A detailed study of the gate/drain voltage dependence of RTN in bulk pMOS transistors
(Elsevier, 2019)Random Telegraph Noise (RTN)has attracted increasing interest in the last years. This phenomenon introduces variability ...
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A Fully Integrated, Power-Efficient, 0.07–2.08 mA, High-Voltage Neural Stimulator in a Standard CMOS Process
(MDPI, 2022)This paper presents a fully integrated high-voltage (HV) neural stimulator with on-chip HV generation. It consists of a ...
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A hardware solution for real-time intelligent fingerprint acquisition
(Springer, 2012)The first step in any fingerprint recognition system is the fingerprint acquisition. A well-acquired fingerprint image ...
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A High-voltage Floating Level Shifter for a Multi-stage Charge-pump in a Standard 1.8 V/3.3 V CMOS Process
(Elsevier, 2022)This paper proposes a high-voltage floating level shifter with a periodically-refreshed charge pump topology. Designed and ...
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A Lightweight Remote Attestation Using PUFs and Hash-based Signatures for Low-end IoT Devices
(Elsevier, 2023)Remote attestation is a powerful mechanism that allows a verifier to know if the hardware of an IoT (Internet-of-Thing) ...
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A Low-Latency, Low-Power CMOS Sun Sensor for Attitude Calculation Using Photovoltaic Regime and On-Chip Centroid Computation
(Institute of Electrical and Electronics Engineers, 2023)The demand for sun sensors has skyrocketed in the last years due to the huge expected deployment of satellites associated ...
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A Low-Voltage Floating-Gate MOS Biquad
(Hindawi Publishing Corporation, 2001)A second-order gm-C filter based on the Floating-Gate MOS (FGMOS) technique is presented. It uses a new fully differential ...
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A mixed-signal architecture for high complexity CMOS fuzzy controlers
(Universidad de Granada: Departamento de Ciencias de la Computación e Inteligencia Artificial, 1999)Analog circuits provide better area/power efficiency than their digital counterparts for low-medium precision requirements ...