Artículo
A 2-MS/s, 11.22 ENOB, Extended Input Range SAR ADC With Improved DNL and Offset Calculation
Autor/es | Asghar, Sohail
Afridi, Sohaib Saadat Pillai, Anu Schuler, Anita Rosa Utrera, José Manuel de la ![]() ![]() ![]() ![]() ![]() ![]() ![]() O'Connell, Ivan |
Departamento | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo |
Fecha de publicación | 2018 |
Fecha de depósito | 2023-12-18 |
Publicado en |
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Resumen | Abstract— A 12-bit successive approximation register analogto-digital converter (ADC) with extended input range is
presented. Employing an input sampling scaling technique,
the presented ADC can digitize the signals with ... Abstract— A 12-bit successive approximation register analogto-digital converter (ADC) with extended input range is presented. Employing an input sampling scaling technique, the presented ADC can digitize the signals with an input range of 3.2 Vpp−d (±1.33 VREF). The circuit also includes a comparator offset compensation technique that results in a residual offset of less than 0.5 LSB. The chip has been designed and implemented in a 0.13-µm CMOS process and demonstrates the state-of-the-art performance, featuring an SNDR of 69.3 dB and the SFDR of 79 dB without requiring any calibration. Total power consumption of the ADC is 0.9 mW, with a measured differential non-linearity of 1.2/−1.0 LSB and INL of 2.3/−2.2 LSB. |
Cita | Asghar, S., Afridi, S.S., Pillai, A., Schuler, A., Rosa Utrera, J.M.d.l. y O'Connell, I. (2018). A 2-MS/s, 11.22 ENOB, Extended Input Range SAR ADC With Improved DNL and Offset Calculation. IEEE Transactions on Circuits and Systems I: Regular Papers, 65 (11), 8439041. https://doi.org/10.1109/TCSI.2018.2852761. |
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