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Capítulo de Libro
Network Time Synchronization: A Full Hardware Approach
(Springer, 2012)
Complex digital systems are typically built on top of several abstraction levels: digital, RTL, computer, operating system and software application. Each abstraction level greatly facilitates the design task at the cost ...
Capítulo de Libro
Open Development Platform for Embedded Systems
(IntechOpen, 2012)
Capítulo de Libro
Power Dissipation Associated to Internal Effect Transitions in Static CMOS Gates
(Springer, 2008)
Power modeling techniques have traditionally neglected the main part of the energy consumed in the internal nodes of static CMOS gates: the power dissipated by input transitions that do not produce output switching. In ...
Capítulo de Libro
Measurement of the Switching Activity of CMOS Digital Circuits at the Gate Level
(Springer, 2002)
Accurate estimation of switching activity is very important in digital circuits. In this paper we present a comparison between the evaluation of the switching activity calculated using logic (Verilog) and electrical (HSPICE) ...
Capítulo de Libro
Static Power Consumption in CMOS Gates Using Independent Bodies
(Springer, 2007)
It has been reported that the use of independent body terminals for series transistors in static bulk-CMOS gates improves their timing and dynamic power characteristics. In this paper, the static power consumption of ...
Artículo
Application of Internode model to global power consumption estimation in SCMOS gates
(Springer, 2005)
In this paper, we present a model, Internode, that unifies the gate functional behavior and the dynamic one. It is based on a FSM that represents the internal state of the gate depending on the electrical load of its ...
Capítulo de Libro
Logic-Level Fast Current Simulation for Digital CMOS Circuits
(Springer, 2005)
Nowadays, verification of digital integrated circuit has been focused more and more from the timing and area field to current and power estimations. The main problem with this kind of verification is on the lack of ...
Capítulo de Libro
Degradation Delay Model Extension to CMOS Gates
(Springer, 2000)
This contribution extends the Degradation Delay Model (DDM), previously developed for CMOS inverters, to simple logic gates. A gate-level approach is followed. At a first stage, all input collisions producing degradation are ...
Capítulo de Libro
Computational Delay Models to Estimate the Delay of Floating Cubes in CMOS Circuits
(Springer, 2003)
The verification of the timing requirements of large VLSI circuits is generally performed by using simulation or timing analysis on each combinational block of the circuit. A key factor in timing analysis is the election ...
Capítulo de Libro
Influence of Clocking Strategies on the Design of Low Switching-Noise Digital and Mixed-Signal VLSI Circuits
(Springer, 2000)
This communication shows the influence of clocking schemes on the digital switching noise generation. It will be shown how the choice of a suited clocking scheme for the digital part reduces the switching noise, thus ...