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Capítulo de Libro
Influence of Clocking Strategies on the Design of Low Switching-Noise Digital and Mixed-Signal VLSI Circuits
(Springer, 2000)
This communication shows the influence of clocking schemes on the digital switching noise generation. It will be shown how the choice of a suited clocking scheme for the digital part reduces the switching noise, thus ...
Capítulo de Libro
Measurement of the Switching Activity of CMOS Digital Circuits at the Gate Level
(Springer, 2002)
Accurate estimation of switching activity is very important in digital circuits. In this paper we present a comparison between the evaluation of the switching activity calculated using logic (Verilog) and electrical (HSPICE) ...
Capítulo de Libro
Degradation Delay Model Extension to CMOS Gates
(Springer, 2000)
This contribution extends the Degradation Delay Model (DDM), previously developed for CMOS inverters, to simple logic gates. A gate-level approach is followed. At a first stage, all input collisions producing degradation are ...