Listar Instituto de Microelectrónica de Sevilla (IMSE-CNM) por autor "Avedillo de Juan, María José"
Mostrando ítems 1-20 de 26
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Artículo
A practical floating-gate Muller-C element using vMOS threshold gates
(Institute of Electrical and Electronics Engineers, 2001)This paper presents the rationale for vMOS-based realizations of digital circuits when logic design techniques based on ...
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Ponencia
Assessing application areas for tunnel transistor technologies
(Institute of Electrical and Electronics Engineers (IEEE), 2016)Tunnel transistors are one of the most attractive steep subthreshold slope devices currently being investigated as a means ...
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Artículo
Comparative Analysis of Projected Tunnel and CMOS Transistors for Different Logic Application Areas
(Institute of Electrical and Electronics Engineers, 2016)In this paper, five projected tunnel FET (TFET) technologies are evaluated and compared with MOSFET and FinFET transistors ...
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Artículo
Comparison of TFETs and CMOS using optimal design points for power-speed trade-offs
(Institute of Electrical and Electronics Engineers, 2017)Tunnel transistors are one of the most attractive steep subthreshold slope devices currently being investigated as a means ...
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Ponencia
Complementary tunnel gate topology to reduce crosstalk effects
(Institute of Electrical and Electronics Engineers (IEEE), 2017)Tunnel transistors are one of the most attractive steep subthreshold slope devices which are being investigated to overcome ...
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Ponencia
DOE based high-performance gate-level pipelines
(Institute of Electrical and Electronics Engineers, 2014)Domino dynamic circuits are widely used in critical parts of high performance systems. In this paper we show that in ...
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Artículo
Domino inspired MOBILE networks
(Institute of Electrical and Electronics Engineers, 2012)MOBILE networks can be operated in a gate-level pipelined fashion allowing high through-output. If MOBILE gates are directly ...
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Artículo
Efficient realisation of MOS-NDR threshold logic gates
(Wiley Open Access, 2009-11-05)A novel realisation of inverted majority gates based on a programmable MOS-NDR device is presented. A comparison, in terms ...
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Artículo
Efficient realization of a threshold voter for self-purging redundancy
(Springer, 2001)The self-purging technique is not commonly used mainly due to the lack of practical implementations of its key component, ...
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Artículo
Efficient state reduction methods for PLA-based sequential circuits
(Institute of Electrical and Electronics Engineers, 1992)Experiences with heuristics for the state reduction of finite-state machines are presented and two new heuristic algorithms ...
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Artículo
Experimental Validation of a Two-Phase Clock Scheme for Fine-Grained Pipelined Circuits Based on Monostable to Bistable Logic Elements
(Institute of Electrical and Electronics Engineers, 2014)Abstract: Research on fine-grained pipelines can be a way to obtain high-performance applications. Monostable to bistable ...
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Ponencia
Exploring logic architectures suitable for TFETs devices
(Institute of Electrical and Electronics Engineers, 2017)Tunnel transistors are steep subthreshold slope devices suitable for low voltage operation so being potential candidates ...
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Artículo
Hardware Implementation of Differential Oscillatory Neural Networks Using VO 2-Based Oscillators and Memristor-Bridge Circuits
(Frontiers Media, 2021)Oscillatory Neural Networks (ONNs) are currently arousing interest in the research community for their potential to implement ...
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Ponencia
Holding Dissapearance in RTD-based Quantizers
(Laboratoire TIMA, 2007)Multiple-valued Logic (MVL) circuits are one of the most attractive applications of the Monostable-to-Multistable transition ...
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Ponencia
Improving robustness of dynamic logic based pipelines
(Institute of Electrical and Electronics Engineers, 2016)Domino dynamic circuits are widely used in critical parts of high performance systems. In this paper we show that, in ...
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Artículo
Improving speed of tunnel FETs logic circuits
(Institute of Electrical and Electronics Engineers, 2015)Tunnel transistors are one of the most attractive steep subthreshold slope devices which are being investigating to overcome ...
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Artículo
Insights Into the Operation of Hyper-FET-Based Circuits
(Institute of Electrical and Electronics Engineers, 2017)Devices combining transistors and phase transition materials are being investigated to obtain steep switching and a boost ...
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Artículo
nu MOS-based sorter for arithmetic applications
(Hindawi Publishing Corporation, 2000)The capabilities of the conceptual link between threshold gates and sorting networks are explored by implementing some ...
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Artículo
Operation limits for RTD-based MOBILE circuits
(IEEE, 2009-02)Resonant-tunneling-diode (RTD)-based monostable-bistable logic element (MOBILE) circuits operate properly in a certain ...
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Ponencia
Redes MOBILE MOS-NDR operando con reloj de una fase
(2010)La existencia de dispositivos con una característica I-V que exhibe una resistencia diferencial negativa (Negative ...