A PCI AER Co-Processor Evaluation Based on CPUs Performance Counters
|Author/s||Domínguez Morales, Manuel Jesús
Linares Barranco, Alejandro
Íñigo Blasco, Pablo
Font Calvo, Juan Luis
Cascado Caballero, Daniel
Jiménez Moreno, Gabriel
Díaz del Río, Fernando
Sevillano Ramos, José Luis
|Department||Universidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadores|
|Abstract||Image processing in digital computer systems usually considers the visual information as a sequence of frames. These frames are from cameras that capture reality for a short period of time. They are renewed and transmitted ...
Image processing in digital computer systems usually considers the visual information as a sequence of frames. These frames are from cameras that capture reality for a short period of time. They are renewed and transmitted at a rate of 25-30 frames per second, in a typical real-time scenario. Digital video processing has to process each frame in order to obtain a filter result or detect a feature on the input. This processing is usually based on very complex and expensive (in resources) operations for an efficient real-time application. Brain can perform very complex visual processing in real-time using relatively simple cells, called neurons, which codify the information into spikes. Spike-based processing is a relatively new approach that implements the processing by manipulating spikes one by one at the time they are transmitted, like a human brain. The spike-based philosophy for visual information processing based on the neuro-inspired Address Event Representation (AER) is achieving nowadays very high performances. In this work we study the low level performance for real-time scenarios of a spike-based co-processor connected to a conventional PC and implemented through a PCI board. These low level lacks are focused both in the software conversion of static frames into AER format and in the bottleneck of the PCI interface.
|Citation||Domínguez Morales, M.J., Linares Barranco, A., Íñigo Blasco, P., Font Calvo, J.L., Cascado Caballero, D., Jiménez Moreno, G.,...,Sevillano Ramos, J.L. (2012). A PCI AER Co-Processor Evaluation Based on CPUs Performance Counters. Journal of Internet Technology, 13 (4), 533-541.|