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Assessing application areas for tunnel transistor technologies

dc.creatorAvedillo de Juan, María Josées
dc.creatorNúñez Martínez, Juanes
dc.date.accessioned2018-05-03T14:45:35Z
dc.date.available2018-05-03T14:45:35Z
dc.date.issued2016
dc.identifier.citationAvedillo de Juan, M.J. y Nuñez Martínez, J. (2016). Assessing application areas for tunnel transistor technologies. En Design of Circuits and Integrated Systems (DCIS) (1-6), Lisboa, 25-27 November 2015: Institute of Electrical and Electronics Engineers (IEEE).
dc.identifier.urihttps://hdl.handle.net/11441/73992
dc.description.abstractTunnel transistors are one of the most attractive steep subthreshold slope devices currently being investigated as a means of overcoming the power density and energy inefficiency limitations of CMOS technology. In this paper, projected tunnel transistor technologies are evaluated and compared to LP and HP versions of both conventional and FinFET CMOS in terms of their power and energy in different application areas.es
dc.description.sponsorshipMinisterio de Economía y Competitividad FEDER TEC2013-40670-Pes
dc.formatapplication/pdfes
dc.language.isoenges
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)es
dc.relation.ispartofDesign of Circuits and Integrated Systems (DCIS) (2016), pp. 1-6.
dc.rightsAtribución-NoComercial-SinDerivadas 3.0 Estados Unidos de América*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.subjectTunnel transistorses
dc.subjectSteep subthreshold slopees
dc.subjectLow poweres
dc.subjectEnergy efficienyes
dc.subjectLow supply voltagees
dc.titleAssessing application areas for tunnel transistor technologieses
dc.typeinfo:eu-repo/semantics/conferenceObjectes
dcterms.identifierhttps://ror.org/03yxnpp24
dc.type.versioninfo:eu-repo/semantics/acceptedVersiones
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Electrónica y Electromagnetismoes
dc.relation.projectIDTEC2013-40670-Pes
dc.relation.publisherversionhttps://doi.org/10.1109/DCIS.2015.7388581es
dc.identifier.doi10.1109/DCIS.2015.7388581es
idus.format.extent6 p.es
dc.publication.initialPage1es
dc.publication.endPage6es
dc.eventtitleDesign of Circuits and Integrated Systems (DCIS)es
dc.eventinstitutionLisboa, 25-27 November 2015es
dc.contributor.funderMinisterio de Economía y Competitividad (MINECO). España

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