Buscar
Mostrando ítems 1-10 de 36
Ponencia
A SoC Design Methodology for LEON2 on FPGA
(IBERCHIP, 2006)
SoC design methodologies show up as a natural and productive method to implement embedded and/or ubiquitous systems. The authors explore the possibilities of the free LEON2 processor core, originally developed by the ...
Ponencia
AUTODDM: AUTOmatic characterization tool for the Delay Degradation Model
(IEEE Computer Society, 2001)
As delay models used in logic timing simulation become more and more complex, the problem of model parameter values extraction arise as an important issue, which is necessary to face in order to achieve a practical i ...
Ponencia
Análisis del comportamiento de la videoconsola Atari 2600 como sistema digital real basado en microprocesador en el laboratorio de electrónica.
(Universidad Politécnica de Valencia, 2004)
En este trabajo se propone una práctica de laboratorio para la asignatura Estructura de Computadores de primer curso de Ingeniería Informática consistente en el análisis de una videoconsola. El objetivo básico consiste ...
Ponencia
Optimization techniques for dynamic behavior modeling of digital CMOS VLSI circuits in nanometric technologies
(IEEE Computer Society, 2005)
In the field of logic simulation, the constant advance of technology influences remarkably in the circuits dynamic behavior. Our main aim is to increase precision of logic simulators by taking into account this influence. ...
Ponencia
Digital Data Processing Peripheral Design for an Embedded Application based on the Microblaze Soft Core
(IEEE Computer Society, 2008)
In this paper we present a design of a peripheral for MicroBlaze soft core processor as part of a R+D project carried out in cooperation with three different companies. The objective of the project consisted in the ...
Ponencia
Internode: Internal Node Logic Computational Model
(IEEE Computer Society, 2003)
In this work, we present a computational behavioral model for logic gates called Internode (Internal Node Logic Computational Model) that considers the functionality of the gate as well as all the different internal ...
Ponencia
Inertial and Degradation Delay Model for CMOS Logic Gates
(IEEE Computer Society, 2000)
The authors present the Inertial and Degradation Delay Model (IDDM) for CMOS digital simulation. The model combines the Degradation Delay Model presented in previous papers with a new algorithm to handle the inertial ...
Ponencia
La primera experiencia en el diseño de sistemas digitales sobre FPGAs
(Universidad Politécnica de Madrid, 2008)
Se presenta una práctica de introducción al diseño de sistemas digitales sobre FPGAs. El objetivo es que se pueda realizar en los primeros cursos dedicados a sistemas digitales, para que la formación no sea fundamentalmente ...
Ponencia
Diseño e implantación de SoPC basados en el microprocesador PicoBlaze
(Universidad Politécnica de Madrid, 2006)
Con este trabajo pretendemos realizar una aportación a la docencia de la materias que cu bren el diseño de SoPC (System on Programmable Chip). Para ello, hemos desarrollado un demostrador de diseño de un SoPC suficientemente ...
Ponencia
Efficient Design of a FFT/IFFT-64 Module on ASIC
(IBERCHIP, 2005)
In this work we present the VHDL implementation of a FFT/IFFT-64 module. This implementation: (a) is relatively quick and (b) occupies a limited amount of area. The module operation is based on a radix-8 butterfly and ...