Listar Ponencias (Tecnología Electrónica) por autor "Bellido Díaz, Manuel Jesús"
Mostrando ítems 1-20 de 53
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Ponencia
A SoC Design Methodology for LEON2 on FPGA
(IBERCHIP, 2006)SoC design methodologies show up as a natural and productive method to implement embedded and/or ubiquitous systems. The ...
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Ponencia
ADKI: un sistema web de adquisición de datos bajo Linux
(Universidad Politécnica de Valencia, 2004)Esta contribución presenta una aplicación genérica de adquisición de datos y control para sistemas simples que incorpora ...
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Ponencia
Algorithms to get the maximum operation frequency for skew-tolerant clocking schemes
(Society of Photo-Optical Instrumentation Engineers (SPIE), 2005)Nowadays it is not possible to neglect the delay of interconnection lines. The die size is rising very fast, and the delay ...
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Ponencia
Análisis del comportamiento de la videoconsola Atari 2600 como sistema digital real basado en microprocesador en el laboratorio de electrónica.
(Universidad Politécnica de Valencia, 2004)En este trabajo se propone una práctica de laboratorio para la asignatura Estructura de Computadores de primer curso de ...
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Aplicación del VHDL en prácticas de diseño de sistemas digitales
(Universidad Politécnica de Madrid, 1994) -
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Arquitectura para el diseño de circuitos autotemporizados bidimensionales. Realización de multiplicadores
(Universidad de Málaga, 1993)La realización de sistemas digitales mediante técnicas autotemporizadas constituye la mejor alternativa para resolver la ...
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Ponencia
AUTODDM: AUTOmatic characterization tool for the Delay Degradation Model
(IEEE Computer Society, 2001)As delay models used in logic timing simulation become more and more complex, the problem of model parameter values ...
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Ponencia
Automatic logic synthesis for parallel alternating latches clocking schemes
(SPIE Digital Library, 2007)This paper proposes a VHDL coding technique that allows for the automatic synthesis of digital circuits using the so called ...
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Ponencia
Building a basic membrane computer
(Fénix, 2016)In this work, we present the building of two well-known membrane com- puters (squares generator and divisor test). Although ...
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Ponencia
Building a SoC for industrial applications based on LEON microprocessor and a GNU/Linux distribution
(IEEE Computer Society, 2008)This paper presents the design of a complete RTU (Remote Terminal Unit) with a System-on-Chip solution based completely ...
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Capítulo de Libro
Computational Delay Models to Estimate the Delay of Floating Cubes in CMOS Circuits
(Springer, 2003)The verification of the timing requirements of large VLSI circuits is generally performed by using simulation or timing ...
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Ponencia
Concepción de un microprocesador: de la especificación a la realización
(Universidad Politécnica de Madrid, 2000) -
Ponencia
Delay and power consumption of static bulk-CMOS gates using independent bodies
(IEEE Computer Society, 2009)Digital designs implemented using SOI processes employ separated bodies for each transistor. This approach is not usually ...
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Ponencia
Delay degradation effect in submicronic CMOS inverters
(Université Catholique de Louvain, 1997)This communication presents the evidence of a degradation effect causing important reductions in the delay of a CMOS ...
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Ponencia
Desarrollo en VHDL de un filtro digital genérico basado en estructuras canónicas.
(Universidad Politécnica de Madrid, 2006)Este trabajo abarca la realización de un filtro digital a bajo nivel. El diseño propuesto se basa en la utilización de ...
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Ponencia
Design and Implementation of a SNTP Client on FPGA
(IEEE Computer Society, 2008)This contribution presents the design and implementation of a SNTP client module suitable for IEC 61850 environments ...
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Ponencia
Design and implementation of a suitable core for on-chip long-term verification
(IEEE Computer Society, 2010)Traditional on-chip and off-chip logic analyzers present important shortcomings when used for the long-term verification ...
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Ponencia
Design of a FFT/IFFT module as an IP core suitable for embedded systems
(IEEE Computer Society, 2007)In this work, we have laid the foundations that allow us to accomplish the implementation of a FFT/IFFT module as an IP ...
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Ponencia
Determinación del coeficiente de resolución en biestables RS CMOS
(Universidad Politécnica de Madrid. Laboratorio de Sistemas Integrados, 1992)El diseño de biestables con riesgo de metaestabilidad requiere que posean coeficientes de resolución adecuados. En este ...
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Ponencia
Digital Data Processing Peripheral Design for an Embedded Application based on the Microblaze Soft Core
(IEEE Computer Society, 2008)In this paper we present a design of a peripheral for MicroBlaze soft core processor as part of a R+D project carried ...