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- Listar Ponencias (Instituto de Microelectrónica de Sevilla (IMSE-CNM)) por autor
Listar Ponencias (Instituto de Microelectrónica de Sevilla (IMSE-CNM)) por autor "Avedillo de Juan, María José"
Mostrando ítems 1-8 de 8
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Ponencia
Assessing application areas for tunnel transistor technologies
Avedillo de Juan, María José; Núñez Martínez, Juan (Institute of Electrical and Electronics Engineers (IEEE), 2016)Tunnel transistors are one of the most attractive steep subthreshold slope devices currently being investigated as a means ...
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Ponencia
Complementary tunnel gate topology to reduce crosstalk effects
Núñez Martínez, Juan; Avedillo de Juan, María José (Institute of Electrical and Electronics Engineers (IEEE), 2017)Tunnel transistors are one of the most attractive steep subthreshold slope devices which are being investigated to overcome ...
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Ponencia
DOE based high-performance gate-level pipelines
Núñez Martínez, Juan; Avedillo de Juan, María José; Quintero Álvarez, Héctor Javier (Institute of Electrical and Electronics Engineers, 2014)Domino dynamic circuits are widely used in critical parts of high performance systems. In this paper we show that in ...
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Ponencia
Exploring logic architectures suitable for TFETs devices
Núñez Martínez, Juan; Avedillo de Juan, María José (Institute of Electrical and Electronics Engineers, 2017)Tunnel transistors are steep subthreshold slope devices suitable for low voltage operation so being potential candidates ...
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Ponencia
Holding Dissapearance in RTD-based Quantizers
Núñez Martínez, Juan; Quintana Toledo, José María; Avedillo de Juan, María José (Laboratoire TIMA, 2007)Multiple-valued Logic (MVL) circuits are one of the most attractive applications of the Monostable-to-Multistable transition ...
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Ponencia
Improving robustness of dynamic logic based pipelines
Quintero Álvarez, Héctor Javier; Avedillo de Juan, María José; Núñez Martínez, Juan (Institute of Electrical and Electronics Engineers, 2016)Domino dynamic circuits are widely used in critical parts of high performance systems. In this paper we show that, in ...
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Ponencia
Redes MOBILE MOS-NDR operando con reloj de una fase
Núñez Martínez, Juan; Avedillo de Juan, María José; Quintana Toledo, José María (2010)La existencia de dispositivos con una característica I-V que exhibe una resistencia diferencial negativa (Negative ...
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Ponencia
Using multi-threshold threshold gates in rtd-based logic design. A case study
Pettenghi Roldán, Héctor; Avedillo de Juan, María José; Quintana Toledo, José María (Laboratoire TIMA, 2007)The basic building blocks for Resonant Tunnelling Diode (RTD) logic circuits are Threshold Gates (TGs) instead of the ...