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Mostrando ítems 21-28 de 28
Artículo
Highly Linear 2,5-V CMOS ΣΔ Modulator for ADSL+
(Institute of Electrical and Electronics Engineers, 2004)
We present a 90-dB spurious-free dynamic range sigma–delta modulator (ΣΔM) for asymmetric digital subscriber line applications (both ADSL and ADSL+), with up to a 4.4-MS/s digital output rate. It uses a cascade (MASH) ...
Ponencia
An Alternative DfT Methodology to Test High-Resolution ΣΔ Modulators
(Institute of Electrical and Electronics Engineers, 2004)
In this paper, a novel DfT methodology to test high-resolution ΣΔ Modulators (ΣΔM) is introduced. The aim of the proposal is to reduce the test time required by conventional methodologies without degrading the accuracy of ...
Ponencia
High-performance ΣΔ ADC for ADSL applications in 0.35μm CMOS digital technology
(Institute of Electrical and Electronics Engineers, 2001)
We present a ΣΔ modulator designed for ADSL applications in a 0.3Sμm CMOS pure digital technology. It employs a 4th-order 3-stage cascade architecture including both single-bit and multi-bit quantizers with programmable ...
Ponencia
A 2.5-V CMOS Wideband Sigma-Delta Modulator
(Institute of Electrical and Electronics Engineers, 2003)
A high-performance Sigma-Delta modulator for wireline communication applications is presenfed It employs a 4th-order cascade multi-bit architecfure that requires only 16 oversampling ratio, and has been implemented using ...
Capítulo de Libro
BandPass Sigma-Delta Analog-to-Digital Converters
(Springer, 2003)
The principle of ΣΔ Modulation (ΣΔM) is extended in BPΣΔMs to bandpass signals, especially but not only, with a narrow bandwidth. Thus, BPΣΔMs have much in common with their lowpass counterparts - whose properties have ...
Ponencia
Study of Non-Linear S/H Operation in Switched-Current Circuits Using Volterra Series - Application to BandPass Sigma-Delta Modulators
(2001)
This paper analyses the transient behaviour of SwItched-current (SI) memory cells placed at the front-end of high-speed A/D interfaces. Based on the Volterra series method, the non-linear sampling process occurring in ...
Ponencia
Top-Down Design of a xDSL 14-bit 4MSh ZA Modulator in Digital CMOS Technology
(Institute of Electrical and Electronics Engineers, 2001)
This paper describes the design of a Sigma-Delta modulator aimed for A/D conversion in xDSL applications, featuring 14-bit@4Msample/s in a 0.35μm mainstream digital CMOS technology. Architecture selection, modulator sizing ...
Artículo
Analysis of error mechanisms in switched-current Sigma-Delta modulators
(Springer, 2004)
This paper presents a systematic analysis of the major switched-current (SI) errors and their influence on the performance degradation of ΣΔ Modulators (ΣΔMs). The study is presented in a hierarchical systematic way. First, ...