Ponencia
Floorplanning as a practical countermeasure against clock fault attack in Trivium stream cipher
Autor/es | Potestad Ordóñez, Francisco Eugenio
Jiménez Fernández, Carlos Jesús Baena Oliva, María del Carmen Parra Fernández, María del Pilar Valencia Barrero, Manuel |
Departamento | Universidad de Sevilla. Departamento de Tecnología Electrónica |
Fecha de publicación | 2018 |
Fecha de depósito | 2021-03-10 |
Publicado en |
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ISBN/ISSN | 978-1-7281-0171-2 2640-5563 |
Resumen | The fault injection in ciphers operation is a very
successful mechanism to attack them. The inclusion of elements
of protection against this kind of attacks is more and more
necessary. These mechanisms are usually based ... The fault injection in ciphers operation is a very successful mechanism to attack them. The inclusion of elements of protection against this kind of attacks is more and more necessary. These mechanisms are usually based on introducing redundancy, which leads to a greater consumption of resources or a longer processing time. This article presents how the introduction of placement restrictions on ciphers can make it difficult to inject faults by altering the clock signal. It is therefore a countermeasure that neither increases the consumption of resources nor the processing time. This mechanism has been tested on FPGA implementations of the Trivium cipher. Several tests have been performed on a Spartan 3E device from Xilinx and the experimental measurements have been carried out with ChipScope Pro. The tests showed that an adequate floorplanning is a good countermeasure against these kind of attacks. |
Agencias financiadoras | Ministerio de Economía y Competitividad (MINECO). España |
Identificador del proyecto | TEC2013-45523-R
TEC2016-80549-R CSIC 201550E039 |
Cita | Potestad Ordóñez, F.E., Jiménez Fernández, C.J., Baena Oliva, M.d.C., Parra Fernández, M.d.P. y Valencia Barrero, M. (2018). Floorplanning as a practical countermeasure against clock fault attack in Trivium stream cipher. En DCIS 2018: Conference on Design of Circuits and Integrated Circuits Lyon, France: IEEE Computer Society. |
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