dc.creator | Serrano Gotarredona, María Teresa | es |
dc.creator | Linares Barranco, Bernabé | es |
dc.creator | Velarde Ramírez, Jesús | es |
dc.date.accessioned | 2020-09-30T11:11:20Z | |
dc.date.available | 2020-09-30T11:11:20Z | |
dc.date.issued | 2004 | |
dc.identifier.citation | Serrano Gotarredona, M.T., Linares Barranco, B. y Velarde Ramírez, J. (2004). A Precise CMOS Mismatch Model for Analog Design from Weak to Strong Inversion. En ISCAS 2004: IEEE International Symposium on Circuits and Systems (753-756), Vancouver, BC, Canada: IEEE Computer Society. | |
dc.identifier.isbn | 0-7803-8251-X | es |
dc.identifier.uri | https://hdl.handle.net/11441/101611 | |
dc.description.abstract | A five parameter mismatch model continuos from
weak to strong inversion is presented. The model is an
extension of a previously reported one valid in the strong
inversion region [1]. A mismatch characterization of
NMOS and PMOS transistors for 30 different geometries
has been done with this continuos model. The model is
able to predict current mismatch with a mean relative error
of 13.5% in the weak inversion region and 5% in strong
inversion. This is verified for 12 different curves,
sweeping , and . Since data is available for
30 different sizes, the mismatch model can be expressed
as function of transistor width W and L, independently.
The proposed model, with explicit W and L dependency
has been implemented in the Spectre simulator.
Simulations reveal that such precise modeling of
mismatch (with explicit W and L dependency) can
improve analog circuit performance without penalty on
power and area consumption: just by splitting transistors
into the optimum number of segments. | es |
dc.description.sponsorship | Ministerio de Ciencia y Tecnología TIC1999-0446-C02-02 | es |
dc.description.sponsorship | Ministerio de Ciencia y Tecnología TIC2000-0406-P4-05 | es |
dc.description.sponsorship | Ministerio de Ciencia y Tecnología FIT-07000/2002/921 | es |
dc.description.sponsorship | Ministerio de Ciencia y Tecnología TIC2002-10878-E | es |
dc.description.sponsorship | Ministerio de Ciencia y Tecnología TIC-2003-08164-C03-01 | es |
dc.description.sponsorship | European Union IST-2001-34124 | es |
dc.format | application/pdf | es |
dc.format.extent | 4 | es |
dc.language.iso | eng | es |
dc.publisher | IEEE Computer Society | es |
dc.relation.ispartof | ISCAS 2004: IEEE International Symposium on Circuits and Systems (2004), p 753-756 | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.title | A Precise CMOS Mismatch Model for Analog Design from Weak to Strong Inversion | es |
dc.type | info:eu-repo/semantics/conferenceObject | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/submittedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadores | es |
dc.relation.projectID | TIC1999-0446-C02-02 | es |
dc.relation.projectID | TIC2000-0406-P4-05 | es |
dc.relation.projectID | FIT-07000/2002/921 | es |
dc.relation.projectID | TIC2002-10878-E | es |
dc.relation.projectID | TIC-2003-08164-C03-01 | es |
dc.relation.projectID | IST-2001-34124 (CAVIAR) | es |
dc.relation.publisherversion | https://ieeexplore.ieee.org/document/1328304 | es |
dc.identifier.doi | 10.1109/ISCAS.2004.1328304 | es |
dc.publication.initialPage | 753 | es |
dc.publication.endPage | 756 | es |
dc.eventtitle | ISCAS 2004: IEEE International Symposium on Circuits and Systems | es |
dc.eventinstitution | Vancouver, BC, Canada | es |
dc.relation.publicationplace | New York, USA | es |
dc.contributor.funder | Ministerio de Ciencia y Tecnología (MCYT). España | es |
dc.contributor.funder | Ministerio de Ciencia y Tecnología (MCYT). España | es |
dc.contributor.funder | Ministerio de Ciencia y Tecnología (MCYT). España | es |
dc.contributor.funder | Ministerio de Ciencia y Tecnología (MCYT). España | es |
dc.contributor.funder | Ministerio de Ciencia y Tecnología (MCYT). España | es |
dc.contributor.funder | European Union (UE) | es |