Ponencia
Four-quadrant one-transistor-synapse for high-density CNN implementations
Autor/es | Domínguez Castro, Rafael
Rodríguez Vázquez, Ángel Benito Espejo Meana, Servando Carlos Carmona Galán, Ricardo |
Departamento | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo |
Fecha de publicación | 1998 |
Fecha de depósito | 2020-02-24 |
Publicado en |
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ISBN/ISSN | 0-7803-4867-2 |
Resumen | Presents a linear four-quadrants, electrically-programmable, one-transistor synapse strategy applicable to the implementation of general massively-parallel analog processors in CMOS technology. It is specially suited for ... Presents a linear four-quadrants, electrically-programmable, one-transistor synapse strategy applicable to the implementation of general massively-parallel analog processors in CMOS technology. It is specially suited for translationally-invariant processing arrays with local connectivity, and results in a significant reduction in area occupation and power dissipation of the basic processing units. This allows higher integration densities and therefore, permits the integration of larger arrays on a single chip. |
Identificador del proyecto | TIC96-1392-C02-02 |
Cita | Domínguez Castro, R., Rodríguez Vázquez, Á.B., Espejo Meana, S.C. y Carmona Galán, R. (1998). Four-quadrant one-transistor-synapse for high-density CNN implementations. En 5th IEEE International Workshop on Cellular Neural Networks and Their Applications (243-248), Londres, Reino Unido: Institute of Electrical and Electronics Engineers. |
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