Data

NameFernández Fernández, Francisco Vidal
DepartmentElectrónica y Electromagnetismo
Knowledge areaElectrónica
Professional categoryCatedrático de Universidad
E-mailRequest
           

  Statistics

  • Items

    57

  • Visits

    3578

  • Downloads

    3144

  Publications

 

PhD Thesis
Icon

Study of variability phenomena on CMOS technologies for its mitigation and exploitation

Fernández Fernández, Francisco Vidal; Castro López, Rafael; Sarazá Canflanca, Pablo (2021-11-12)
Variability phenomena in CMOS technologies have become a growing concern in recent years. One of the main reasons for this ...
PhD Thesis
Article
Icon

Hierarchical Yield-Aware Synthesis Methodology Covering Device-, Circuit-, and System-Level for Radiofrequency ICs

Canelas, Antonio; Moreira de Passos, Fabio; Lourenco, Nuno; Martins, Ricardo; Roca, Elisenda; Castro López, Rafael; Horta, Nuno; Fernández Fernández, Francisco Vidal (Institute of Electrical and Electronics Engineers, 2021-01-01)
This paper presents an innovative yield-aware synthesis strategy based on a hierarchical bottom-up methodology that uses ...
Article
Icon

Chaotic image encryption using hopfield and hindmarsh–rose neurons implemented on FPGA

Tlelo-Cuautle, Esteban; Díaz-Muñoz, Jonathan Daniel; González-Zapata, Astrid Maritza; Li, Rui; León-Salas, Walter Daniel; Fernández Fernández, Francisco Vidal; Guillén-Fernández, Omar; Cruz-Vega, Israel (Multidisciplinary Digital Publishing Institute (MDPI), 2020-01-01)
Chaotic systems implemented by artificial neural networks are good candidates for data encryption. In this manner, this ...
Article
Icon

A versatile CMOS transistor array IC for the statistical characterization of time-zero variability, RTN, BTI, and HCI

Díaz Fortuny, Javier; Martín Martínez, Javier; Rodríguez Martínez, Rosana; Castro López, Rafael; Roca Moreno, Elisenda; Fernández Fernández, Francisco Vidal; Aragonès Cervera, Xavier; Barajas Ojeda, Enrique; Mateo Peña, Diego; Nafría Maqueda, Montserrat (Institute of Electrical and Electronics Engineers (IEEE), 2019-01-01)
Statistical characterization of CMOS transistor variability phenomena in modern nanometer technologies is key for accurate ...
Article
Icon

PVT-Robust CMOS Programmable Chaotic Oscillator: Synchronization of Two 7-Scroll Attractors

Carbajal-Gomez, Victor Hugo; Tlelo-Cuautle, E.; Sánchez López, Carlos; Fernández Fernández, Francisco Vidal (MDPI, 2019-01-01)
Designing chaotic oscillators using complementary metal-oxide-semiconductor (CMOS) integrated circuit technology for ...
PhD Thesis
IconIcon

Una aproximación multinivel para el diseño sistemático de circuitos integrados de radiofrecuencia.

Fernández Fernández, Francisco Vidal; Roca Moreno, Elisenda; Moreira de Passos, Fabio (2018-04-13)
En un mercado bien establecido como el de las telecomunicaciones, donde se está evolucionando hacia el 5G, se estima que ...
PhD Thesis
Icon

Diseño de circuitos analógicos y de señal mixta con consideraciones de diseño físico y variabilidad

Fernández Fernández, Francisco Vidal; Castro López, Rafael; Toro Frías, Antonio (2017-09-29)
Advances in microelectronic technology has been based on an increasing capacity to integrate transistors, moving this ...
Article
Icon

An automated design methodology of RF circuits by using Pareto-optimal fronts of EMsimulated inductors

González Echevarría, Reinier; Roca Moreno, Elisenda; Castro López, Rafael; Fernández Fernández, Francisco Vidal; Sieiro, J.; López Villegas, J. M.; Vidal, N. (Institute of Electrical and Electronics Engineers, 2017-01-01)
A new design methodology for radiofrequency circuits is presented that includes electromagnetic (EM) simulation of the ...
Article
Icon

Parametric macromodeling of integrated inductors for RF circuit design

Passos, Fabio; Ye, Y.; Spina, D.; Roca Moreno, Elisenda; Castro López, Rafael; Dhaene, T.; Fernández Fernández, Francisco Vidal (Wiley-Blackwell, 2017-01-01)
Nowadays, parametric macromodeling techniques are widely used to describe electromagnetic structures. In this contribution, ...
Article
Icon

Introduction to the special issue on SMACD 2012

Fernández Fernández, Francisco Vidal; Roca Moreno, Elisenda; Castro López, Rafael (Springer, 2014-01-01)
Welcome to the Special Issue devoted to the 2012 edition of the International Conference on Synthesis, Modeling, Analysis ...
Article
Icon

Context-dependent transformation of Pareto-optimal performance fronts of operational amplifiers

Roca Moreno, Elisenda; Velasco Jiménez, Manuel; Castro López, Rafael; Fernández Fernández, Francisco Vidal (Springer, 2012-01-01)
The use of Pareto-optimal performance fronts in emerging design methodologies for analog integrated circuits is a keystone ...
Article
Icon

Efficient and accurate statistical analog yield optimization and variation-aware circuit sizing based on computational intelligence techniques

Liu, Bo; Fernández Fernández, Francisco Vidal; Gielen, Georges (Institute of Electrical and Electronics Engineers, 2011-01-01)
In nanometer complementary metal-oxide-semiconductor technologies, worst-case design methods and response-surface-based ...
Article
Icon

Pathological element-based active device models and their application to symbolic analysis

Sánchez López, Carlos; Fernández Fernández, Francisco Vidal; Tlelo-Cuautle, E.; Tan, Sheldon X.-D. (Institute of Electrical and Electronics Engineers, 2011-01-01)
This paper proposes new pathological element-based active device models which can be used in analysis tasks of linear(ized) ...
Presentation
Icon

Load-independent characterization of trade-off fronts for operational amplifiers

Roca Moreno, Elisenda; Velasco Jiménez, Manuel; Castro López, Rafael; Fernández Fernández, Francisco Vidal (2010-01-01)
Abstract—In emerging design methodologies for analog integrated circuits, the use of performance trade-off fronts, also ...
Article
Icon

AMS/RF-CMOS circuit design for wireless transceivers

Castro López, Rafael; Rodríguez de Llera, Delia; Ismail, Mohammed; Fernández Fernández, Francisco Vidal (Elsevier, 2009-01-01)
Article
Icon

Systematic design of high-resolution high-frequency cascade continuous-time sigma-delta modulators

Tortosa Navas, Ramón; Rodríguez Vázquez, Ángel Benito; Fernández Fernández, Francisco Vidal; Rosa Utrera, José Manuel de la; Roca Moreno, Elisenda; Castro López, Rafael (2008-01-01)
Article
Icon

Editorial (Integration, the VLSI Journal)

; Fernández Fernández, Francisco Vidal (Elsevier, 2008-01-01)
Article
Icon

A design tool for high-resolution high-frequency cascade continuous- time Σ∆ modulators

Tortosa Navas, Ramón; Castro López, Rafael; Rosa Utrera, José Manuel de la; Rodríguez Vázquez, Ángel Benito; Fernández Fernández, Francisco Vidal (SPIE, 2007-01-01)
This paper introduces a CAD methodology to assist the de signer in the implementation of continuous-time (CT) cas- cade ...
Presentation
Icon

A 12-bit@40MS/s Gm-C Cascade 3-2 Continuous-Time Sigma-Delta Modulator

Tortosa Navas, Ramón; Aceituno, Antonio; Rosa Utrera, José Manuel de la; Rodríguez Vázquez, Ángel Benito; Fernández Fernández, Francisco Vidal (Institute of Electrical and Electronics Engineers, 2007-01-01)
This paper reports the transistor-level design of a 130-nm CMOS continuous-time cascade ΣΔ modulator. The modulator topology, ...
Article
Icon

A new high-level synthesis methodology of cascaded continuous-time ΣΔ modulators

Tortosa Navas, Ramón; Rosa Utrera, José Manuel de la; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2006-01-01)
This brief presents an efficient method for synthesizing cascaded sigma–delta modulators implemented with continuous-time ...
Presentation
Icon

Design of a 1.2-V 130nm CMOS 13-bit@40MS/s Cascade 2-2-1 Continuous-Time ΣΔ Modulator

Tortosa Navas, Ramón; Aceituno Marchena, Antonio; Rosa Utrera, José Manuel de la; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2006-01-01)
This paper presents the design of a continuous- time multibit cascade 2-2-1 ΣΔ modulator for broadband telecom systems. ...
Presentation
Icon

Reconfiguration of Cascade ΣΔ Modulators for Multistandard GSM/Bluetooth/UIMTS/WLAN Transceivers

Morgado García de la Polavieja, Alonso; Río Fernández, Rocío del; Rosa Utrera, José Manuel de la; Medeiro Hidalgo, Fernando; Pérez Verdú, Belén; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2006-01-01)
This paper presents design considerations for cascade Sigma-Delta Modulators (ΣΔMs) included in multi-standard wireless ...
Presentation
Icon

Design of a 1.2-V Cascade Continuous-Time Sigma-Delta Modulator for Broadband Telecommunications

Tortosa Navas, Ramón; Rosa Utrera, José Manuel de la; Rodríguez Vázquez, Ángel Benito; Fernández Fernández, Francisco Vidal (Institute of Electrical and Electronics Engineers, 2006-01-01)
This paper presents the design of a continuous-time multibit cascade 2-2-1 sigma-delta modulator for broadband telecom systems.
Article
Icon

High-level synthesis of switched-capacitor, switched-current and continuous-time ΣΔ modulators using SIMULINK-based time-domain behavioral models

Ruiz Amaya, Jesús; Rosa Utrera, José Manuel de la; Fernández Fernández, Francisco Vidal; Medeiro Hidalgo, Fernando; Río Fernández, Rocío del; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2005-01-01)
This paper presents a high-level synthesis tool for ΣΔ Modulators (ΣΔMs) that combines an accurate SIMULINK-based time-domain ...
Presentation
Icon

Effect of Clock Jitter Error on the Performance Degradation of Multi-bit Continuous-Time ΣΔ Modulators With NRZ DAC

Tortosa Navas, Ramón; Rosa Utrera, José Manuel de la; Rodríguez Vázquez, Ángel Benito; Fernández Fernández, Francisco Vidal (2005-01-01)
This paper analyses the effect of the clock jitter error in multi-bit continuous-time ΣΔ modulators with non-return-to-zero ...
Presentation
Icon

On the suitability and development of layout templates for analog layout reuse and layout-aware synthesis

Castro López, Rafael; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito (The International Society for Optical Engineering - SPIE, 2005-01-01)
Accelerating the synthesis of increasingly complex analog integrated circuits is key to bridge the widening gap between ...
Presentation
Icon

A Reuse-based framework for the design of analog and mixed-signal ICs

Castro López, Rafael; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito (The International Society for Optical Engineering -SPIE, 2005-01-01)
Despite the spectacular breakthroughs of the semiconductor industry, the ability to design integrated circuits (ICs) under ...
Presentation
Icon

Geometrically-constrained, parasitic-aware synthesis of analog ICs

Castro López, Rafael; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito (The International Society for Optical Engineering - SPIE, 2005-01-01)
In order to speed up the design process of analog ICs, iterations between different design stages should be avoided as ...
Presentation
Icon

Continuous-time cascaded ΣΔ modulators for VDSL: A comparative study

Tortosa Navas, Ramón; Rosa Utrera, José Manuel de la; Rodríguez Vázquez, Ángel Benito; Fernández Fernández, Francisco Vidal (The International Society for Optical Engineering - SPIE, 2005-01-01)
This paper describes new cascaded continuous-time ΣΔ modulators intended to cope with very high-rate digital subscriber ...
Presentation
Icon

A Direct Synthesis Method of Cascaded Continuous-Time Sigma-Delta Modulators

Tortosa Navas, Ramón; Rosa Utrera, José Manuel de la; Rodríguez Vázquez, Ángel Benito; Fernández Fernández, Francisco Vidal (2005-01-01)
This paper presents an efficient method to synthesize cascaded sigma-delta modulators implemented with continuous-time ...
Presentation
Icon

Analysis of Clock Jitter Error in Multibit Continuous-Time ΣΔ modulators with NRZ Feedback Waveform

Tortosa Navas, Ramón; Rosa Utrera, José Manuel de la; Rodríguez Vázquez, Ángel Benito; Fernández Fernández, Francisco Vidal (Institute of Electrical and Electronics Engineers, 2005-01-01)
This paper presents a detailed study of the clock jitter error in multibit continuous-time ΣΔ modulators with non-return-to-zero ...
Presentation
Icon

An Optimization-based Tool for the High-Level Synthesis of Discrete-time and continuous-Time Sigma-Delta Modulators in the MATLAB/SIMULINK Environment

Ruiz Amaya, Jesús; Rosa Utrera, José Manuel de la; Medeiro Hidalgo, Fernando; Fernández Fernández, Francisco Vidal; Río Fernández, Rocío del; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2004-01-01)
This paper presents a MATLAB toolbox for the automated high-level sizing of ΣΔ Modulators (ΣΔMs) based on the combination ...
Presentation
Icon

MATLAB/SIMULINK-Based High-Level Synthesis of Discrete-Time and Continuous-Time Sigma-Delta Modulators

Ruiz Amaya, Jesús; Rosa Utrera, José Manuel de la; Medeiro Hidalgo, Fernando; Fernández Fernández, Francisco Vidal; Río Fernández, Rocío del; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2004-01-01)
This paper describes a tool that combines an accurate SIMULINK-based time-domain behavioural simulator with a statistical ...
Article
Icon

Analog and mixed-signal IC design and design methodologies

Fernández Fernández, Francisco Vidal (Elsevier, 2003-01-01)
Presentation
Icon

Accurate VHDL-based simulation of Sigma Delta modulators

Castro López, Rafael; Fernández Fernández, Francisco Vidal; Medeiro Hidalgo, Fernando; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2003-01-01)
The computational cost of transient simulation of /spl Sigma//spl Delta/ modulators (/spl Sigma//spl Delta/Ms) at the ...
Presentation
Icon

Generation of technology-portable flexible analog blocks

Castro López, Rafael; Fernández Fernández, Francisco Vidal; Delgado Restituto, Manuel; Medeiro Hidalgo, Fernando; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2002-01-01)
This paper introduces a complete methodology for retargeting of analog blocks to different sets of specifications, even ...
Presentation
Icon

A hierarchical approach for the symbolic analysis of large analog integrated circuits

Guerra Vinuesa, Oscar; Roca Moreno, Elisenda; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito (IEEE computer society digital library, 2000-01-01)
This paper introduces a new hierarchical analysis methodology which incorporates approximation strategies during the ...
Presentation
Icon

An error-controlled methodology for approximate hierarchical symbolic analysis

Guerra Vinuesa, Oscar; Rodríguez García, Juan D.; Roca Moreno, Elisenda; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2000-01-01)
Limitations of existing approaches for symbolic analysis of large analog circuits are discussed. To address their solution, ...
Presentation
Icon

RAPID-retargetability for reusability of application-driven quadrature D/A interface block design

Franca, J.; Horta, N.; Pereira, M.; Vital, J.; Castro López, Rafael; Delgado Restituto, Manuel; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito; Ramos, J.; Santos, P. (Institute of Electrical and Electronics Engineers, 1999-01-01)
This paper describes ESPRIT 29648, concerning the development of an advanced methodology for the design of a mixed-signal ...
Article
Icon

Error control in simplification before generation algorithms for symbolic analysis of large analogue circuits

Rodríguez García, Juan D.; Guerra Vinuesa, Oscar; Roca Moreno, Elisenda; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito (Institution of Engineering and Technology, 1999-01-01)
Circuit reduction is a fundamental first step in addressing the symbolic analysis of large analogue circuits. A new algorithm ...
Presentation
Icon

An accurate error control mechanism for simplification before generation algorithms

Guerra Vinuesa, Oscar; Rodríguez García, Juan D.; Roca Moreno, Elisenda; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1999-01-01)
The use of simplification before generation techniques to enable the approximate symbolic analysis of large analog circuits ...
Chapter of Book
Icon

Symbolic analysis of large analog integrated circuits: the numerical reference generation problem

Fernández Fernández, Francisco Vidal; Fernández Fernández, Francisco Vidal; Guerra Vinuesa, Oscar; Rodríguez García, Juan D.; Rodríguez Vázquez, Ángel Benito (IEEE press, 1998-01-01)
Symbolic analysis potentialities for gaining circuit insight and for efficient repetitive evaluations have been limited ...
Presentation
Icon

Behavioral modeling of PWL analog circuits using symbolic analysis

Fernández Fernández, Francisco Vidal; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1998-01-01)
Behavioral models are used both for top-down design and for bottom-up verification. During top-down design, models are ...
Presentation
Icon

An algorithm for numerical reference generation in symbolic analysis of large analog circuits

García Vargas, Ignacio; Galán, Mariano; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1997-01-01)
This paper addresses the problems arising in the calculation of numerical references (network function coefficients), ...
Presentation
Icon

Mismatch distance term compensation in centroid configurations with nonzero-area devices

Sánchez Karhunen, Eduardo; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1997-01-01)
This paper presents an analytical approach to distance term compensation in mismatch models of integrated devices. Firstly, ...
Presentation
Icon

Comparison of matroid intersection algorithms for large circuit analysis

Galán, Mariano; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1997-01-01)
This paper presents two approaches to symbolic analysis of large analog integrated circuits via simplification during the ...
Presentation
Icon

Symbolic analysis tools-the state of the art

Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1996-01-01)
This paper reviews the main last generation symbolic analyzers, comparing them in terms of functionality, pointing out also their shortcomings. The state of the art in this field is also studied, pointing out directions for future research.
Presentation
Icon

A Family of matroid intersection algorithms for the computation of approximated symbolic network functions

Wambacq, Piet; Fernández Fernández, Francisco Vidal; Gièlen, Georges G.E.; Sansen, Willy M.C.; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1996-01-01)
In recent years, the technique of simplification during generation has turned out to be very promising for the efficient ...
Article
Icon

Efficient symbolic computation of approximated small-signal characteristics of analog integrated circuits

Wambacq, Piet; Fernández Fernández, Francisco Vidal; Gielen, Georges; Sansen, Willy M.C.; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1995-01-01)
A symbolic analysis tool is presented that generates simplified symbolic expressions for the small-signal characteristics ...
Presentation
Icon

Tool for fast mismatch analysis of analog circuits

Rodríguez Macías, Rafael; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1995-01-01)
A tool is presented that evaluates statistical deviations in performance characteristics of analog circuits, starting from ...
Article
Icon

Global design of analog cells using statistical optimization techniques

Medeiro Hidalgo, Fernando; Rodríguez Macías, R.; Fernández Fernández, Francisco Vidal; Domínguez Castro, Rafael; Huertas Díaz, José Luis; Rodríguez Vázquez, Ángel Benito (Springer, 1994-01-01)
We present a methodology for automated sizing of analog cells using statistical optimization in a simulation based approach. ...
Article
Icon

Algorithm for efficient symbolic analysis of large analogue circuits

Wambacq, Piet; Gièlen, Georges G.E.; Sansen, Willy M.C.; Rodríguez Vázquez, Ángel Benito; Fernández Fernández, Francisco Vidal (Institution of Engineering and Technology, 1994-01-01)
An algorithm is presented that generates simplified symbolic expressions for the small-signal characteristics of large ...
Presentation
Icon

Symbolic analysis of large analog integrated circuits by approximation during expression generation

Fernández Fernández, Francisco Vidal; Wambacq, Piet; Gièlen, Georges G.E.; Rodríguez Vázquez, Ángel Benito; Sansen, Willy M.C. (Institute of Electrical and Electronics Engineers, 1994-01-01)
A novel algorithm is presented that generates approximate symbolic expressions for small-signal characteristics of large ...
PhD Thesis
Icon

Técnicas de análisis simbólico para el modelado y diseño de circuitos integrados analógicos

Rodríguez Vázquez, Ángel Benito; Fernández Fernández, Francisco Vidal (1992-01-01)
Presentation
Icon

On simplification techniques for symbolic analysis of analog integrated circuits

Fernández Fernández, Francisco Vidal; Martín, J. D.; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1992-01-01)
This paper addresses the topic of formula simplification for symbolic analyzers. Previously reported criteria for flat ...
Presentation
Icon

An advanced symbolic analyzer for the automatic generation of analog circuit design equations

Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1991-01-01)
A tool for symbolic analysis of analog integrated circuits is presented featuring accurate simplification, pole/zero ...