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Pixel design and evaluation in CMOS image sensor technology

 

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Opened Access Pixel design and evaluation in CMOS image sensor technology
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Author: Vargas Sierra, Sonia
Roca Moreno, Elisenda
Liñán Cembrano, Gustavo
Date: 2009
Published in: XXIV Conference on Design of Circuits and Integrated Systems (2009), p 1-6
Document type: Presentation
Abstract: A chip designed in a 0.18 μm CMOS Image Sensor Technology (CIS) is presented which incorporates different pixel design alternatives for Active Pixel Sensor (APS). CIS technology improves characteristics such as sensitivity, dark current and noise, that are strongly layout dependent. This chip includes a set of pixel architectures where different parameters have been modified: layout of active diffusion, threshold voltage of the source follower transistor and the use of microlenses. Besides, structures to study the influence of crosstalk between pixels have been incorporated.
Cite: Vargas Sierra, S., Roca Moreno, E. y Liñán Cembrano, G. (2009). Pixel design and evaluation in CMOS image sensor technology. En XXIV Conference on Design of Circuits and Integrated Systems, Zaragoza (España).
Size: 974.6Kb
Format: PDF

URI: https://hdl.handle.net/11441/80735

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