Artículo
Phase Synchronization Operator for On-Chip Brain Functional Connectivity Computation
Autor/es | Delgado Restituto, Manuel
Romaine, James Brian Rodríguez Vázquez, Ángel Benito |
Departamento | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo |
Fecha de publicación | 2019 |
Fecha de depósito | 2019-12-05 |
Publicado en |
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Resumen | This paper presents an integer-based digital processor for the calculation of phase synchronization between two neural signals. It is based on the measurement of time periods between two consecutive minima. The simplicity ... This paper presents an integer-based digital processor for the calculation of phase synchronization between two neural signals. It is based on the measurement of time periods between two consecutive minima. The simplicity of the approach allows for the use of elementary digital blocks, such as registers, counters, and adders. The processor, fabricated in a 0.18- μ m CMOS process, only occupies 0.05 mm 2 and consumes 15 nW from a 0.5 V supply voltage at a signal input rate of 1024 S/s. These low-area and low-power features make the proposed processor a valuable computing element in closed-loop neural prosthesis for the treatment of neural disorders, such as epilepsy, or for assessing the patterns of correlated activity in neural assemblies through the evaluation of functional connectivity maps. |
Identificador del proyecto | TEC2016-80923-P
N00014-19-1-2156 |
Cita | Delgado Restituto, M., Romaine, J.B. y Rodríguez Vázquez, Á.B. (2019). Phase Synchronization Operator for On-Chip Brain Functional Connectivity Computation. IEEE Transactions on Biomedical Circuits and Systems, 13 (5), 957-970. |
Ficheros | Tamaño | Formato | Ver | Descripción |
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Phase Synchronization Operator.pdf | 4.421Mb | [PDF] | Ver/ | |