Power Dissipation Associated to Internal Effect Transitions in Static CMOS Gates

Millán Calderón, Alejandro; Juan Chico, Jorge; Bellido Díaz, Manuel Jesús; Guerrero Martos, David; Ruiz de Clavijo Vázquez, Paulino; Viejo Cortés, Julián

doi:10.1007/978-3-540-95948-9_39

Capítulo de Libro

dc.creator	Millán Calderón, Alejandro	es
dc.creator	Juan Chico, Jorge	es
dc.creator	Bellido Díaz, Manuel Jesús	es
dc.creator	Guerrero Martos, David	es
dc.creator	Ruiz de Clavijo Vázquez, Paulino	es
dc.creator	Viejo Cortés, Julián	es
dc.date.accessioned	2017-01-24T10:41:33Z
dc.date.available	2017-01-24T10:41:33Z
dc.date.issued	2008
dc.identifier.citation	Millán Calderón, A., Juan Chico, J.,...,Viejo Cortés, J. (2008). Power Dissipation Associated to Internal Effect Transitions in Static CMOS Gates. En Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2008. Lecture Notes in Computer Science, vol 5349 (pp. 389-398). Berlin: Springer.
dc.identifier.isbn	978-3-540-95947-2	es
dc.identifier.issn	0302-9743	es
dc.identifier.uri	http://hdl.handle.net/11441/52628
dc.description.abstract	Power modeling techniques have traditionally neglected the main part of the energy consumed in the internal nodes of static CMOS gates: the power dissipated by input transitions that do not produce output switching. In this work, we present an experimental set-up that shows that this power component may contribute up to 59% of the total power consumption of a gate in modern technologies. This fact makes very important to include it into any accurate power model	es
dc.description.sponsorship	Ministerio de Educación y Ciencia HYPER MIC TEC2007-61802
dc.format	application/pdf	es
dc.language.iso	eng	es
dc.publisher	Springer	es
dc.relation.ispartof	Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2008. Lecture Notes in Computer Science, vol 5349	es
dc.rights	Attribution-NonCommercial-NoDerivatives 4.0 Internacional	*
dc.rights.uri	http://creativecommons.org/licenses/by-nc-nd/4.0/	*
dc.title	Power Dissipation Associated to Internal Effect Transitions in Static CMOS Gates	es
dc.type	info:eu-repo/semantics/bookPart	es
dcterms.identifier	https://ror.org/03yxnpp24
dc.type.version	info:eu-repo/semantics/acceptedVersion	es
dc.rights.accessRights	info:eu-repo/semantics/openAccess	es
dc.contributor.affiliation	Universidad de Sevilla. Departamento de Tecnología Electrónica	es
dc.relation.projectID	HYPER MIC TEC2007-61802	es
dc.relation.publisherversion	http://link.springer.com/chapter/10.1007%2F978-3-540-95948-9_39	es
dc.identifier.doi	10.1007/978-3-540-95948-9_39	es
dc.contributor.group	Universidad de Sevilla. TIC204: Investigación y Desarrollo Digital (ID2)
idus.format.extent	10	es
dc.publication.initialPage	389	es
dc.publication.endPage	398	es
dc.relation.publicationplace	Berlin	es
dc.contributor.funder	Ministerio de Educación y Ciencia (MEC). España

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