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dc.creatorPalomeque Mangut, Davides
dc.creatorRodríguez Vázquez, Ángel Benitoes
dc.creatorDelgado Restituto, Manuel es
dc.date.accessioned2024-02-15T18:13:15Z
dc.date.available2024-02-15T18:13:15Z
dc.date.issued2023
dc.identifier.citationPalomeque Mangut, D., Rodríguez Vázquez, Á.B. y Delgado Restituto, M. (2023). A 4.2–13.2 V, on-chip, regulated, DC–DC converter in a standard 1.8V/3.3V CMOS process. AEU - International Journal of Electronics and Communications, 161, 154527. https://doi.org/10.1016/j.aeue.2023.154527.
dc.identifier.issn1434-8411es
dc.identifier.issn1618-0399es
dc.identifier.urihttps://hdl.handle.net/11441/155292
dc.description.abstractThis paper presents a fully on-chip HV-regulated DC–DC boost converter for the power management unit of an electrical neural stimulator. The core of the DC–DC converter consists of a 4x4 array of individually-configurable charge pumps. The rows and columns of the array can be dynamically enabled or disabled, thus extending the range of suitable output voltages and load currents. Additionally, the converter includes a feedback loop for output voltage regulation which allows responding to abrupt changes in the load current within a few microseconds. The circuit has been designed in a standard 180 nm 1.8V/3.3V CMOS process and occupies an active area of 2.1 mm2. An exhaustive experimental characterization of the proposed circuit was carried out. Experimental results demonstrate that, for an input voltage of 3 V, the DC–DC converter's regulated output ranges from 4.2 V to 13.2 V under load currents of 0.1–4 mA. Maximum delivered power is around 48 mW. The power efficiency of the converter at the highest achievable output voltage under a 4 mA load current is higher than 65% for input voltages above 2.4 V.es
dc.description.sponsorshipMinisterio de Ciencia e Innovación PID2019-110410RB-I00es
dc.description.sponsorshipOffice of Naval Research 310 N00014-19-12156es
dc.description.sponsorshipGobierno de España FPU18/00247es
dc.formatapplication/pdfes
dc.format.extent10 p.es
dc.language.isoenges
dc.publisherElsevieres
dc.relation.ispartofAEU - International Journal of Electronics and Communications, 161, 154527.
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internacional*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.subjectCharge pumpes
dc.subjectCMOSes
dc.subjectDC–DC converteres
dc.subjectHigh voltage compliancees
dc.subjectNeural stimulationes
dc.subjectPower managementes
dc.subjectSwitched-capacitores
dc.titleA 4.2–13.2 V, on-chip, regulated, DC–DC converter in a standard 1.8V/3.3V CMOS processes
dc.typeinfo:eu-repo/semantics/articlees
dc.type.versioninfo:eu-repo/semantics/publishedVersiones
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Electrónica y Electromagnetismoes
dc.relation.projectIDPID2019-110410RB-I00es
dc.relation.projectID310 N00014-19-12156es
dc.relation.projectIDFPU18/00247es
dc.relation.publisherversionhttps://doi.org/10.1016/j.aeue.2023.154527es
dc.identifier.doi10.1016/j.aeue.2023.154527es
dc.journaltitleAEU - International Journal of Electronics and Communicationses
dc.publication.volumen161es
dc.publication.initialPage154527es
dc.contributor.funderMinisterio de Ciencia e Innovación (MICIN). Españaes
dc.contributor.funderOffice of Naval Research (ONR). United Stateses
dc.contributor.funderGobierno de Españaes

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