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Mostrando ítems 21-30 de 301
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Realización de un proyecto en grupo con carácter multidisciplinar para alumnos de Ingeniería de la Salud usando la metodología ABP
(Asociación de Enseñantes Universitarios de la Informática (AENUI), 2016)
La sociedad avanza, y este avance favorece la aparición de nuevas necesidades, las cuales son cubiertas por profesionales especializados en campos específicos, como médicos, ingenieros, profesores, etc. Pero cada ...
Ponencia
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Live Demonstration: Neuromorphic Row-by-Row Multi-convolution FPGA Processor-SpiNNaker architecture for Dynamic-Vision Feature Extraction
(IEEE Computer Society, 2019)
In this demonstration a spiking neural network architecture for vision recognition using an FPGA spiking convolution processor, based on leaky integrate and fire neurons (LIF) and a SpiNNaker board is presented. The ...
Ponencia
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LVDS interface for AER links with burst mode operation capability
(IEEE Computer Society, 2008)
This paper presents the design and simulation of a serial AER LVDS communication link. It converts data from classical AER parallel bus with a 4-phase handshaking protocol into a bit stream which is transmitted serially ...
Ponencia
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Visual Spike-based Convolution Processing with a Cellular Automata Architecture
(IEEE Computer Society, 2010)
this paper presents a first approach for implementations which fuse the Address-Event-Representation (AER) processing with the Cellular Automata using FPGA and AER-tools. This new strategy applies spike-based ...
Ponencia
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High-Speed Character Recognition System based on a complex hierarchical AER architecture
(IEEE Computer Society, 2008)
In this paper we briefly summarize the fundamental properties of spikes processing applied to artificial vision systems. This sensing and processing technology is capable of very high speed throughput, because it does ...
Ponencia
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PCI to AER Hardware/Software interface for Real- Time Vision processing
(IEEE, 2005-06)
In this paper we present a mechanism that allows the coprocessing of video in real-time based into Address-Event-Representation (A ER) convolutions chips. Several software methods fur generating synthetic AEK streams from ...
Ponencia
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Generating Second Order (Co)homological Information within AT-Model Context
(Springer, 2019)
In this paper we design a new family of relations between (co)homology classes, working with coefficients in a field and starting from an AT-model (Algebraic Topological Model) AT(C) of a finite cell complex C These ...
Ponencia
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Neuromorphic Real-Time Objects Tracking Using Address Event Representation and Silicon Retina
(Springer, 2011)
This paper presents a hierarchical neuromorphic system for tracking objects. We use AER (Address Event Representation) for transmitting and processing visual information provided by an asynchronous temporal contrast silicon ...
Ponencia
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Live Demonstration: neuromorphic robotics, from audio to locomotion through spiking CPG on SpiNNaker.
(IEEE Computer Society, 2019)
This live demonstration presents an audio-guided neuromorphic robot: from a Neuromorphic Auditory Sensor (NAS) to locomotion using Spiking Central Pattern Generators (sCPGs). Several gaits are generated by sCPGs ...
Artículo
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Enhanced Linearity in FD-SOI CMOS Body-Input Analog Circuits - Application to Voltage-Controlled Ring Oscillators and Frequency-Based sigma Delta ADCs
(Institute of Electrical and Electronics Engineers, 2020)
Abstract— This paper investigates the use of the body terminal of MOS transistors to improve the linearity of some key circuits used to implement analog and mixed-signal circuits integrated in Fully Depleted Silicon on ...