Browsing Ponencias (Arquitectura y Tecnología de Computadores) by Author "Camuñas Mesa, Luis Alejandro"
Now showing items 1-7 of 7
-
Presentation
Event-Driven Configurable Module with Refractory Mechanism for ConvNets on FPGA
(IEEE Computer Society, 2018)We have developed a fully configurable event-driven convolutional module with refractory period mechanism that can be ...
-
Presentation
Event-driven stereo vision with orientation filters
(IEEE Computer Society, 2014)The recently developed Dynamic Vision Sensors (DVS) sense dynamic visual information asynchronously and code it into ...
-
Presentation
Experimental Body-input Three-stage DC offset Calibration Scheme for Memristive Crossbar
(IEEE, 2020)Reading several ReRAMs simultaneously in a neuromorphic circuit increases power consumption and limits scalability. Applying ...
-
Presentation
Fully Digital AER Convolution Chip for Vision Processing
(IEEE Computer Society, 2008)We present a neuromorphic fully digital convolution microchip for Address Event Representation (AER) spike-based processing ...
-
Presentation
Implementation of binary stochastic STDP learning using chalcogenide-based memristive devices
(IEEE, 2021-04)The emergence of nano-scale memristive devices encouraged many different research areas to exploit their use in multiple ...
-
Presentation
Neocortical frame-free vision sensing and processing through scalable Spiking ConvNet hardware
(IEEE Computer Society, 2010)This paper summarizes how Convolutional Neural Networks (ConvNets) can be implemented in hardware using Spiking neural ...
-
Presentation
On scalable spiking convnet hardware for cortex-like visual sensory processing systems
(IEEE Computer Society, 2010)This paper summarizes how Convolutional Neural Networks (ConvNets) can be implemented in hardware using Spiking neural ...