Ponencia
Event-Driven Configurable Module with Refractory Mechanism for ConvNets on FPGA
Autor/es | Camuñas Mesa, Luis Alejandro
Domínguez Cordero, Yaisel L. Serrano Gotarredona, María Teresa Linares Barranco, Bernabé |
Departamento | Universidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadores Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo |
Fecha de publicación | 2018 |
Fecha de depósito | 2020-10-21 |
Publicado en |
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ISBN/ISSN | 978-1-5386-4881-0 2379-447X |
Resumen | We have developed a fully configurable event-driven
convolutional module with refractory period mechanism that can
be used to implement arbitrary Convolutional Neural Networks
(ConvNets) on FPGAs following a 2D array ... We have developed a fully configurable event-driven convolutional module with refractory period mechanism that can be used to implement arbitrary Convolutional Neural Networks (ConvNets) on FPGAs following a 2D array structure. Using this module, we have implemented in a Spartan6 FPGA a 4-layer ConvNet with 22 convolutional modules trained for poker card symbol recognition. It has been tested with a stimulus where 40 poker cards were observed by a Dynamic Vision Sensor (DVS) in 1s time. A traffic control mechanism is implemented to downsample high speed input stimuli while keeping spatio-temporal correlation. For slow stimulus play back, a 96% recognition rate is achieved with a power consumption of 0.85mW. At maximum play back speed, the recognition rate is still above 63% when less than 20% of the input events are processed. |
Agencias financiadoras | European Union (UE) European Union (UE) Ministerio de Ciencia, Innovación y Universidades (MICINN). España Junta de Andalucía |
Identificador del proyecto | 644096 (ECOMODE
687299 (NEURAM3) TEC2015- 63884-C2-1-P TIC-6091 |
Cita | Camuñas Mesa, L.A., Domínguez Cordero, Y.L., Serrano Gotarredona, M.T. y Linares Barranco, B. (2018). Event-Driven Configurable Module with Refractory Mechanism for ConvNets on FPGA. En ISCAS 2018: IEEE International Symposium on Circuits and Systems Florence, Italy: IEEE Computer Society. |
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