Listar Ponencias (Instituto de Microelectrónica de Sevilla (IMSE-CNM)) por título
Mostrando ítems 157-176 de 307
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Ponencia
Effect of Clock Jitter Error on the Performance Degradation of Multi-bit Continuous-Time ΣΔ Modulators With NRZ DAC
(2005)This paper analyses the effect of the clock jitter error in multi-bit continuous-time ΣΔ modulators with non-return-to-zero ...
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Ponencia
Effect of Non-Linear Settling Error on The Harmonic Distortion of Fully-Differential Switched-Current BandPass Sigma-Delta Modulators
(Institute of Electrical and Electronics Engineers, 2001)This paper presents a detailed study of the effect of the non-linear settling on the harmonic distortion of BandPass SD ...
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Ponencia
Effects of capacitors non-idealities in un-even split-capacitor array SAR ADCs
(Institute of Electrical and Electronics Engineers, 2016)This paper studies the effects of capacitors non-idealities in the performance of un-even split-capacitor SAR ADCs. Also, ...
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Ponencia
Effects of electrical fields on neuroblastoma (N2A) cell differentiation: preliminary results
(Scitepress, 2021)This work describes Electrical Stimulations (ES) assays on stem cells. The neuroblastoma (N2A) cell linage was submitted ...
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Ponencia
Electrical-level synthesis of pipeline ADCs
(Institute of Electrical and Electronics Engineers, 2008)This paper presents a design tool for the synthesis of pipeline ADCs which is able to optimally map high-level converter ...
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Ponencia
Embedded face detection application based on local binary patterns
(Institute of Electrical and Electronics Engineers, 2015)In computer vision during the recent years a new paradigm for object detection has stimulated researchers and designers interest. ...
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Ponencia
El Entorno: Vision - E Laboratory
(2010)Se presenta un entorno de programación para el estudio y desarrollo de algoritmos de tratamiento de imágenes y visión por ...
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Ponencia
Event-driven sensing and processing for high-speed robotic vision
(Institute of Electrical and Electronics Engineers, 2014)We present here an overview of a new vision paradigm where sensors and processors use visual information ...
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Ponencia
Expandible high-order cascade ya modulator with constant, reduced systematic loss of resolution
(Institute of Electrical and Electronics Engineers, 2003)An arbitrary order sigma-delta modulator cascude architecture is presented with only I-bit loss of resolution due to scaling ...
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Ponencia
Experimental Characterization of IdleTones in Second-Order Bandpass ΣΔ Modulators
(2000)This paper analyses the tonal behaviour of the quantization noise in second-order bandpass ΣΔ modulators. The analysis ...
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Ponencia
Experimental demonstration of real-time image-processing using a VLSI analog programmable array processor
(SPIE- The International Society for Optical Engineering, 2000)This paper describes a full-custom mixed-signal chip which embeds distributed optical signal acquisition, digitallyprogrammable analog ...
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Ponencia
Experimental Evidence of Power Efficiency due to Architecture in Cellular Processor Array Chips
(Institute of Electrical and Electronics Engineers, 2016)Speeding up algorithm execution can be achieved by increasing the number of processing cores working in parallel. Of course, ...
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Ponencia
Experimental verification of chaotic encryption of audio using monolithic chaotic modulators
(SPIE- The International Society for Optical Engineering, 1995)This paper reports the first experimental verification of chaotic encryption of audio signals using integrated circuits. ...
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Ponencia
Exploiting memristance for implementing spike-time-dependent-plasticity in neuromorphic nanotechnology systems
(2009)In this paper we show that STDP can be implemented using a crossbar memristive array combined with neurons that asynchronously ...
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Ponencia
Exploring logic architectures suitable for TFETs devices
(Institute of Electrical and Electronics Engineers, 2017)Tunnel transistors are steep subthreshold slope devices suitable for low voltage operation so being potential candidates ...
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Ponencia
Focal-plane generation of multi-resolution and multi-scale image representation for low-power vision applications
(The International Society for Optics and Photonics, 2011)Early vision stages represent a considerably heavy computational load. A huge amount of data needs to be processed under ...
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Ponencia
Focal-Plane Scale Space Generation with a 6T Pixel Architecture
(Society for Imaging Science and Technology, 2016)Aiming at designing a CMOS image sensor that combines high fill factor and focal-plane implementation of instrumental image ...
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Ponencia
Form Factor Improvement of Smart-Pixels for Vision Sensors through 3-D Vertically- Integrated Technologies
(Institute of Electrical and Electronics Engineers, 2014)While conventional CMOS active pixel sensors embed only the circuitry required for photo-detection, pixel addressing and ...
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Ponencia
Four-quadrant one-transistor-synapse for high-density CNN implementations
(Institute of Electrical and Electronics Engineers, 1998)Presents a linear four-quadrants, electrically-programmable, one-transistor synapse strategy applicable to the implementation ...