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Mostrando ítems 11-20 de 428
Ponencia
A mixed-signal early vision chip with embedded image and programming memories and digital I/O
(The International Society for Optical Engineering - SPIE, 2003)
From a system level perspective, this paper presents a 128 × 128 flexible and reconfigurable Focal-Plane Analog Programmable Array Processor, which has been designed as a single chip in a 0.35μm standard digital 1P-5M CMOS ...
Ponencia
Digital processor array implementation aspects of a 3D multi-layer vision architecture
(Institute of Electrical and Electronics Engineers, 2010)
Technological aspects of the 3D integration of a multilayer combined mixed-signal and digital sensor-processor array chip is described. The 3D integration raises the question of signal routing, power distribution, and heat ...
Artículo
A Customizable Thermographic Imaging System for Medical Image Acquisition and Processing
(Institute of Electrical and Electronics Engineers, 2022)
A custom system has been developed for medical image acquisition and processing in both the visible and the infrared (IR) bands. Unlike some non-customizable commercial devices, this system can easily be adapted to different ...
Artículo
A CMOS Digital SiPM With Focal-Plane Light-Spot Statistics for DOI Computation
(Institute of Electrical and Electronics Engineers, 2017)
Silicon photomultipliers can be used to infer the depth-of-interaction (DOI) in scintillator crystals. DOI can help to improve the quality of the positron emission tomography images affected by the parallax error. This ...
Artículo
Ultralow-power processing array for image enhancement and edge detection
(Institute of Electrical and Electronics Engineers, 2012)
This paper presents a massively parallel processing array designed for the 0.13-μm 1.5-V standard CMOS base process of a commercial 3-D through-silicon via stack. The array, which will constitute one of the fundamental ...
Ponencia
A CMOS fully-differential bandpass ΣΔ modulator using switched-current circuits
(Institute of Electrical and Electronics Engineers, 1995)
This paper presents a fourth-order bandpass sigma-delta modulator that has been designed using fully-differential switched-current circuits in a 0.8μm CMOS technology. The modulator prototype has been obtained by applying ...
Ponencia
Low-Noise and High-Efficiency Near-IR SPADs in 110nm CIS Technology
(Institute of Electrical and Electronics Engineers, 2019)
Photon detection at longer wavelengths is much desired for LiDAR applications. Silicon photodiodes with deeper junctions and larger multiplication regions are in principle more sensitive to near-IR photons. This paper ...
Ponencia
Integer-based digital processor for the estimation of phase synchronization between neural signals
(Institute of Electrical and Electronics Engineers, 2016)
This paper reports a low area, low power, integer-based neural digital processor for the calculation of phase synchronization between two neural signals. The processor calculates the phase-frequency content of a signal by ...
Artículo
Using Building Blocks to Design Analog Neuro-Fuzzy Controllers
(Institute of Electrical and Electronics Engineers, 1995)
We present a parallel architecture for fuzzy controllers and a methodology for their realization as analog CMOS chips for low- and medium-precision applications. These chips can be made to learn through the adaptation of ...
Ponencia
A Reuse-based framework for the design of analog and mixed-signal ICs
(The International Society for Optical Engineering -SPIE, 2005)
Despite the spectacular breakthroughs of the semiconductor industry, the ability to design integrated circuits (ICs) under stringent time-to-market (TTM) requirements is lagging behind integration capacity, so far keeping ...