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Ponencia
Design Considerations for Multistandard Cascade ΣΔ Modulators
(2005)
This paper discusses design considerations for cascade Sigma-Delta Modulators (ΣΔMs) included in multistandard wireless receivers. Four different standards are covered: GSM, Bluetooth, UMTS, and WLAN. A top-down design ...
Ponencia
Effect of Clock Jitter Error on the Performance Degradation of Multi-bit Continuous-Time ΣΔ Modulators With NRZ DAC
(2005)
This paper analyses the effect of the clock jitter error in multi-bit continuous-time ΣΔ modulators with non-return-to-zero feedback waveform. Derived expressions show that the jitter-induced noise power can be separated ...
Ponencia
La simulación eléctrica en el trabajo académicamente dirigido como vehículo docente para la enseñanza de la electrónica
(2008)
La Electrónica es una disciplina versátil en cuanto a las metodologías y técnicas docentes que pueden emplearse. Frente a las clases magistrales, experiencias de cátedra, tutorías y clases prácticas, el Trabajo Académicamente ...
Artículo
A new high-level synthesis methodology of cascaded continuous-time ΣΔ modulators
(Institute of Electrical and Electronics Engineers, 2006)
This brief presents an efficient method for synthesizing cascaded sigma–delta modulators implemented with continuous-time circuits. It is based on the direct synthesis of the whole cascaded architecture in the continuous-time ...