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Listar por autor "Linares Barranco, Bernabé"
Mostrando ítems 21-40 de 175
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Artículo
A memristive nanoparticle/organic hybrid synapstor for neuro-inspired computing.
Alibart, Fabien; Pleutin, Stéphane; Bichler, Olivier; Gamrat, Christian; Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé; Vuillaume, Dominique (Wiley, 2011)A large effort is devoted to the research of new computing paradigms associated with innovative nanotechnologies that ...
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Ponencia
A Methodology for MOS Transistor Mismatch Parameter Extraction and Mismatch Simulation
Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé (IEEE Computer Society, 2000)This paper presents a methodology for mismatch parameter extraction and mismatch simulation using conventional electrical ...
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Ponencia
A Mismatch Calibrated Bipolar Spatial Contrast AER Retina with Adjustable Contrast Threshold
Leñero Bardallo, Juan Antonio; Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé (IEEE Computer Society, 2009)Address Event Representation (AER) is an emergent technology for assembling modular multi-blocks bio-inspired sensory ...
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Ponencia
A Model for VLSI implementation of CNN image processing chips using current-mode techniques
Espejo Meana, Servando Carlos; Rodríguez Vázquez, Ángel Benito; Domínguez Castro, Rafael; Linares Barranco, Bernabé; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1993)A new Cellular Neural Network model is proposed which allows simpler and faster VLSI implementation than previous models. ...
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Artículo
A modified ART 1 algorithm more suitable for VLSI implementations
Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé (Elsevier, 1996)This paper presents a modification to the original ART 1 algorithm (Carpenter and Grossberg, 1987a, A massively parallel ...
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Artículo
A modular current-mode high-precision winner-take-all circuit
Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé (IEEE Computer Society, 1995)In this paper we present a Winner-Take-All (WTA) circuit realized using current-mode circuit design techniques. The ...
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Artículo
A modular T-mode design approach for analog neural network hardware implementations
Linares Barranco, Bernabé; Sánchez Sinencio, Edgar; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1992)A modular transconductance-mode (T-mode) design approach is presented for analog hardware implementations of neural networks. ...
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Artículo
A neuromorphic cortical-layer microchip for spike-based event processing vision systems
Serrano Gotarredona, Rafael; Serrano Gotarredona, María Teresa; Acosta Jiménez, Antonio José; Linares Barranco, Bernabé (Institute of Electrical and Electronics Engineers, 2006)We present a neuromorphic cortical-layer processing microchip for address event representation (AER) spike-based processing ...
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Ponencia
A New Strong Inversion 5-Parameter Transistor Mismatch Model
Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé (IEEE Computer Society, 2000)A new 5-parameter MOS transistor mismatch model is introduced capable of predicting transistor mismatch with very high ...
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Ponencia
A novel CMOS analog neural oscillator cell
Linares Barranco, Bernabé; Sánchez Sinencio, Edgar; Newcomb, Robert W.; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1989)A very flexible programmable CMOS analog neural oscillator cell architecture is presented. The proposed neuron circuit ...
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Ponencia
A Physical Interpretation of the Distance Term in Pelgrom’s Mismatch Model results in very Efficient CAD
Linares Barranco, Bernabé; Serrano Gotarredona, María Teresa (IEEE Computer Society, 2007)In 1989 Pelgrom et al. published a mismatch model for MOS transistors, where the standard quadratic deviation of the ...
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Artículo
A precise 90º quadrature OTA-C oscillator tunable in the 50-130-MHz range
Linares Barranco, Bernabé; Serrano Gotarredona, María Teresa; Ramos Martos, J.; Ceballos Cáceres, Joaquín Francisco; Linares Barranco, Alejandro (Institute of Electrical and Electronics Engineers, 2004)We present a very-large-scale integration continuous-time sinusoidal operational transconductance amplifiers quadrature ...
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Ponencia
A Precise CMOS Mismatch Model for Analog Design from Weak to Strong Inversion
Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé; Velarde Ramírez, Jesús (IEEE Computer Society, 2004)A five parameter mismatch model continuos from weak to strong inversion is presented. The model is an extension of a ...
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Artículo
A Programmable Neural Oscillator Cell
Linares Barranco, Bernabé; Sánchez Sinencio, Edgar; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1989)A programmable analog neural oscillator cell architecture is presented. The proposed neuron circuit is of hysteretic neural ...
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Artículo
A programmable VLSI filter architecture for application in real-time vision processing systems
Serrano Gotarredona, María Teresa; Andreou, Andreas G.; Linares Barranco, Bernabé (World Scientific Publishing, 2000)An architecture is proposed for the realization of real-time edge-extraction filtering operation in an Address-Event-Representation ...
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Artículo
A real-time clustering microchip neural engine
Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé (Institute of Electrical and Electronics Engineers, 1996)This paper presents an analog current-mode VLSI implementation of an unsupervised clustering algorithm. The clustering ...
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Artículo
A Real-Time, Event Driven Neuromorphic System for Goal-Directed Attentional Selection
Gallupi, Francesco; Brohan, Kevin; Davidson, Simón; Serrano Gotarredona, María Teresa; Pérez Carrasco, José Antonio; Linares Barranco, Bernabé; Furber, Steve B. (Springer Verlag, 2012)Computation with spiking neurons takes advantage of the abstraction of action potentials into streams of stereotypical ...
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Ponencia
A signed spatial contrast event spike retina chip
Leñero Bardallo, Juan Antonio; Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé (IEEE Computer Society, 2010)Reported AER (Address Event Representation) contrast retinae perform a contrast computation based on the ratio between a ...
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Ponencia
A spatial calibrated AER contrast retina with adjustable contrast threshold
Leñero Bardallo, Juan Antonio; Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé (2009)Address Event Representation (AER) is an emergent technology for assembling modular multi-blocks bio-inspired sensory and ...
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Artículo
A spatial contrast retina with on-chip calibration for neuromorphic spike-based AER vision systems
Costas Santos, Jesús; Serrano Gotarredona, María Teresa; Serrano Gotarredona, Rafael; Linares Barranco, Bernabé (Institute of Electrical and Electronics Engineers, 2007)We present a 32 32 pixels contrast retina microchip that provides its output as an address event representation (AER) ...