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dc.creator Miró Amarante, María Lourdes es
dc.creator Jiménez Fernández, Ángel Francisco es
dc.creator Linares Barranco, Alejandro es
dc.creator Gómez Rodríguez, Francisco de Asís es
dc.creator Paz Vicente, Rafael es
dc.creator Jiménez Moreno, Gabriel es
dc.creator Civit Balcells, Antón es
dc.date.accessioned 2019-07-08T10:20:03Z
dc.date.available 2019-07-08T10:20:03Z
dc.date.issued 2007
dc.identifier.citation Miró Amarante, M.L., Jiménez Fernández, Á.F., Linares Barranco, A., Gómez Rodríguez, F.d.A., Paz Vicente, R., Jiménez Moreno, G. y Civit Balcells, A. (2007). A LVDS Serial AER Link. En ISCAS 2007: IEEE International Symposium on Circuits and Systems (1537-1540), New Orleans, USA: IEEE Computer Society.
dc.identifier.isbn 1-4244-0920-9 es
dc.identifier.issn 0271-4302 es
dc.identifier.uri https://hdl.handle.net/11441/87917
dc.description.abstract Address-Event-Representation (AER) is a communication protocol for transferring asynchronous events between VLSI chips, originally developed for bio-inspired processing systems (for example, image processing). Such systems may consist of a complicated hierarchical structure with many chips that transmit data among them in real time, while performing some processing (for example, convolutions). The event information is transferred using a high speed digital parallel bus (typically 16 bits and 20ns-40ns per event). This paper presents a testing platform for AER systems that allows to analyse a LVDS Serial AER link. The interface allows up to 0.7 Gbps (~40Mev/s, 16 bits/ev). The eye diagram ensures that the platform could support 1.2 Gbps. es
dc.description.sponsorship Commission of the European Communities IST-2001-34124 (CAVIAR) es
dc.description.sponsorship Comisión Interministerial de Ciencia y Tecnología TIC-2003-08164-C03-02 es
dc.format application/pdf es
dc.language.iso eng es
dc.publisher IEEE Computer Society es
dc.relation.ispartof ISCAS 2007: IEEE International Symposium on Circuits and Systems (2007), p 1537-1540
dc.rights Attribution-NonCommercial-NoDerivatives 4.0 Internacional *
dc.rights.uri http://creativecommons.org/licenses/by-nc-nd/4.0/ *
dc.title A LVDS Serial AER Link es
dc.type info:eu-repo/semantics/conferenceObject es
dc.type.version info:eu-repo/semantics/submittedVersion es
dc.rights.accessrights info:eu-repo/semantics/openAccess es
dc.contributor.affiliation Universidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadores es
dc.relation.projectID IST-2001-34124 (CAVIAR) es
dc.relation.projectID TIC-2003-08164-C03-02 es
dc.relation.publisherversion https://ieeexplore.ieee.org/document/4252944 es
dc.identifier.doi 10.1109/ISCAS.2007.378704 es
dc.contributor.group Universidad de Sevilla. TEP-108: Robótica y Tecnología de Computadores Aplicada a la Rehabilitación
idus.format.extent 4 es
dc.publication.initialPage 1537 es
dc.publication.endPage 1540 es
dc.eventtitle ISCAS 2007: IEEE International Symposium on Circuits and Systems es
dc.eventinstitution New Orleans, USA es
dc.relation.publicationplace New York, USA es
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